This a secure RoT inspired by the OpenTitan design. The chips will be used to do a differential power analysis (DPA) and test our design techniques to mitigate side-channel attacks. Note: This RoT is supposed to be integrated with a secure PMU but we could barely fit the RoT in one test harness.
generated from efabless/caravel_user_project
minghungumich/OpenFASOC-RoT-IBEX-AES
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