Caravel User Project

This is a submission from Morgan State University for class EEGR 463.

This design contains an 8-bit RISC processor.

Name		Name	Last commit message	Last commit date
Latest commit History 439 Commits
.github/workflows		.github/workflows
.idea		.idea
caravel		caravel
def		def
docs		docs
gds		gds
lef		lef
mag		mag
maglef		maglef
mgmt_core_wrapper		mgmt_core_wrapper
openlane		openlane
sdc		sdc
sdf		sdf
signoff		signoff
spef		spef
spi/lvs		spi/lvs
verilog		verilog
.gitignore		.gitignore
LICENSE		LICENSE
Makefile		Makefile
README.md		README.md

tanvirarafin/msu_sub