Cluster-V SoC contains a cluster of four RISC-V rv32imac cores. Each core has local SRAM and a local interrupt controller for interprocessor-interrupt (IPI). The cluster has shared SRAM and HyperRAM controllers, and a peripheral ring.
Quad cluster of RISC-V cores with peripherals and local memory
License
mballance/clusterv-soc
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
Quad cluster of RISC-V cores with peripherals and local memory
Resources
License
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published