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Cryptography Accelerator v2

This is a cryptography accelerator chip for the GF180 PW0 tapeout. It includes an AES256 core (with some key-entropy restrictions), a SHA256 core, and some other experimental structures. This includes improved versions of unsuccessful cores from MPW-ONE.

For documentation on the AES and SHA cores (including the original Chisel source code), see asinghani/crypto-accelerator

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