The project includes In Memory Computing RRAM Accelerator , designed by our team at IIT Delhi. This is the updated version of our previous submission. The project includes changes in the circuit of different blocks of the complete design.

The Project consists of following blocks:

1. RRAM controller (Digital)
2. In memory computing RRAM Array(Analog)
3. Other Sensing Circuits

Team members & Designers :

1. Chithambara Moorthii
2. Ayan Ray
3. Richa Mishra
4. Vivek Parmar
5. Digamber kumar Pandey
6. Deepak verma