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8-bit_priority_encoder_vnr

Initial Report_SSCS Contest

Abstract:-

A priority encoder is a circuit that compresses multiple binary(2*n) inputs into a smaller number of (n) outputs based on priority.If two or more inputs are high at the same time, the input having the highest priority will take precedence.It takes 8 bits as input,and gives back 3 bits as output based on priority.Priority encoder was designed with conventional CMOS technique,because operational speed is high,noise is low,better thermal stability and low power consumption as compared to FET,BJT.Encoders are good at compressing data. However, the problem with binary encoders is that if more than one of the input bits is high, then it produces an error at the output. Whereas priority encoders were made to overcome this issue. It gives an output by considering only the highest priority bit.We use eSim,skywater 130 pdk open source for implementation.

Circuit Diagram:-

WhatsApp Image 2021-07-26 at 10 56 57 AM

Reference output:-

WhatsApp Image 2021-07-29 at 6 54 15 PM

Reference links:-

1.https://www.electronics-tutorials.ws/combination/comb_4.html

2.https://www.semanticscholar.org/paper/High-speed-and-low-power-CMOS-priority-encoders-Wang-Huang/af92a8c39bdb4d608b52c58632badac30d93b9b3

3.https://www.researchgate.net/profile/Yukang-Feng/publication/325592310_Analysis_and_Design_of_8-Bit_CMOS_Priority_Encoders/links/5b7969eba6fdcc5f8b5487ac/Analysis-and-Design-of-8-Bit-CMOS-Priority-Encoders.pdf?origin=publication_detail

Team Members:-

UPPALA BHARGAVA SAI

RUDRANGI MANJUNATH

PEDDAVONTARI SURAJ REDDY

MADHAVAM SAI KAIVALYA

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