This is an implementation of a single-cycle RISC-V processor inside of the Caravel test system for use in the SkyWater 130nm PDK.
forked from efabless/caravel_mpw-one
Caravel_RISCV_OSU is an implementation of a single-cycle RISC-V processor inside of the Caravel test harness intended for use with the SkyWater 130nm PDK.
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AlexSUnderwood/caravel_riscv_osu
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Caravel_RISCV_OSU is an implementation of a single-cycle RISC-V processor inside of the Caravel test harness intended for use with the SkyWater 130nm PDK.
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