Skip to content

siva12a/caravel_peripheral_extender

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

3 Commits
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Caravel_peripheral_extender

License UPRJ_CI Caravel Build

Refer to README for this sample project documentation. This Project integrates various IP's like I2C, I2S, SPI ,QSPI, PWM, GPIO, UART, JTAG to the caravel SoC. The IP's connect to the Caravel Wishbone Bus and use the User Adddessable space from address 0x3000_0000.

About

A collection of Peripherals like I2C, SPI, QSPI, JTAG, UART, PWM GPIO, TIMER, WS281B led controller connected to the Caravel SoC via the wishbone Bus.

Resources

License

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published