The goal of this 2022 chipathon submission is to build a demonstrator chip in the 10 mm² user project area of the caravel/caravan harness to assess the feasibility of implementing mm-wave designs in a low-cost technology using a complete open-source RFIC design flow in the sky130 technology.

We propose to submit a number of basic mm-wave circuits, such as voltage-controlled oscillator, power amplifier, balun, low-noise amplifier and detector, as well as some test features like inductors, (slow-wave) transmission lines and a basic TRL calibration kit. All at 60 GHz.

The 130 nm node was released at the beginning of the 2000's, and is by now a legacy technology, regarded as obsolete for cutting-edge digital design. However, for analog and RF applications, this node is more than capable of delivering adequate performances, even into the 60 GHz ISM band. The maximum frequency of oscillation (Fmax) of the n-channel MOSFETs of a 130 nm process is at around 120 GHz, thus this node can be used for 5G and V-band processes! The back-end of line (BEOL), the metal and dielectric stack that forms the interconnection layers of an IC, is where the RF structures are realized. The metal, thickness and height of the BEOL dictates the quality of the passive RF structures, such as transmission lines, spiral inductors and capacitors. In this regard, the sky130 process offers a flexible, 5-layer BEOL with a few interesting features, such as:

A local interconnection layer for high-density cells;

Two intermediate layers for high-density MIM capacitors;

Two thin metals for interconnection, two intermediate metals for low-loss contacts and a thicker top layer that enables good quality passive devices, etc.

The main tools needed for a complete RFIC design flow must cover the following topics:

Schematic capture;

S-parameter simulation, large-signal non-linear simulation, noise simulation;

Full-wave simulation;

Layout with parasitic extraction (RC minimum, RLCK ideally);

DRC and LVS;

The open-source environment offers some solutions for these problems. The list of softwares that were used for the design and implementation of these designs are:

Schematic capture: xschem;

S-parameter simulation, non-linear simulation: ngspice for transient and small-signal S-parameter analysis;

Full-wave simulation: openEMS (initial experiments);

Layout: klayout;

Parasitic extraction: magic VLSI (RC) and fastHenry (initial experiments);

DRC: klayout and magic;

LVS: netgen.

Other free, but closed-source software that were used at some point during the design flow are listed below:

ASITIC for inductor design and simulation;

QucsStudio for rubberband tuning and transmission line circuit design;

Sonnet lite for full-wave simulations (initial experiments).