salaheag /  UNIC-CASS_precheck_AI_CORDIC_LIU

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Description of the Design Idea:* The COordinate Rotation DIgital Computer (CORDIC) is a multiplier-less and hardware friendly circuit processor that uses shift-add operations to compute mathematical operations such as trigonometric functions, division, square root, and others. CORDIC is of high interest in many application domains such as embedded neural networks, Discrete Cosine Transform, singular value decomposition, etc. The folded serial word architecture of the CORDIC is given by Fig. 1. It uses a single shift-add operation for each component: each unit consists of a multiplexer, a shift register, and an adder/subtractor. At the beginning of each CORDIC computation, a set of the input values Xin, Yin, and Zin is provided as inputs to Mux (2:1 multiplexer). Then the computation proceeds using the values stored in Xreg, Yreg, and Zreg respectively. The ROM stores the micro-rotation angles 〖tan^(-1) (〗⁡〖2^(-i))〗 where i is the input of the ROM and varies from 0 to 29. The FSM is fundamental in the realization of the process and control of the system; it is used to keep track of shifting distances and the ROM addresses. The FSM has three states (s0, s1, and s2) depending on three different signals: “reset”, “start” and “count.” Based on the different states, three outputs are controlled “init”, “load” and “done” which indicate the progress of the system at runtime. If “reset” is set to 1, the FSM is at state s0 and the output “init” is set to 1. At this point, the registers X, Y, and Z take their initialization value. For example, in the case of rotation mode CORDIC for Cosine and Sine functions computation, these values are: “X = 0.6072,” “Y = 0,” and “Z = angle” the desired angle of rotation. Once “reset” is set to 0, and “start = 1,” the FSM proceeds to the state s1, so we set “load = 1” at the output, indicating that the system is in the phase of calculating the sine and cosine of the input angle. As long as the “count” signal is different from the number of iterations the state remains at s1. When “count” reaches the number of iterations, the FSM changes state and switches to s2 where “done” is assigned to 1 indicating the end of the calculations. Hence, the system returns to its default state s0 and waits for another computation order when the start is set to 1 again. CORDIC has two modes of operations: rotation and vectoring. The proposed design focuses on the rotation mode. In this mode, the angle accumulator (Z component) is initialized with the desired angle of rotation (Z0). The result of this operation is a vector (x’, y’) rotation of (x, y) by the angle of rotation Z0. The rotation at each iteration diminishes the magnitude of the residual angle of Z. Therefore, the direction of rotations is determined by the sign of the Zreg: if it is positive then the two “ADDER” for X and Z components operate as adders, while the one for Y operates as subtractor. Else, all operations are inverted. For instance, CORDIC operating in rotation mode can simultaneously compute the sine and cosine functions of the input angle. The Y component of the input vector should be set to zero, and the equations of the rotational mode are given by: Xn = An · X0 cosZ0 Yn = An · X0 sinZ0 (1) The X component is initialized to 1/An = 0.6072, so the rotation produces unscaled sine and cosine functions for the input angle. This method reduces the hardware complexity by saving the required multiplication by the scaling factor 1/An if the X component is initialized otherwise.
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Jeff DiCorpo committed 2 years ago