urielcho /  ITA23_GFMPW1

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Maintained by urielcho
The primary objective of this project was to impart knowledge about the fundamentals of microchip creation using 130nm and 180nm technology. Key concepts, from Verilog design to obtaining the final GDS layout for fabrication, were covered.
Members 1

Project: Microchip Development with 130nm and 180nm Technology

This project was undertaken during the Technological Week at the Technological Institute of Aguascalientes. The initiative aimed to educate 22 engineering students, specializing in electronics, semiconductors, and electrical engineering, along with three professors.

Project Overview

The primary objective of this project was to impart knowledge about the fundamentals of microchip creation using 130nm and 180nm technology. Key concepts, from Verilog design to obtaining the final GDS layout for fabrication, were covered.

Project Structure

The project comprises 64 Verilog-designed modules, each capable of encrypting a 12-letter message. These modules served as a foundation for each student to personalize their own message. Subsequently, the 64 modules were interconnected through a multiplexer.

Multiplexer Functionality

A multiplexer was implemented, allowing the selection of messages through a 6-bit selector. This functionality provides flexibility to the project, enabling each student to choose their specific message from the available options.

Running the Project

To run the project, follow these steps:

  1. Clone this repository to your local machine.
  2. Open the Verilog design files using your preferred development environment.
  3. Customize the modules as needed.
  4. Compile the design and generate the layout in GDS format.
  5. Follow the manufacturing instructions to obtain the final microchips.

We hope this project serves as a valuable educational resource and sparks interest in microchip design among the participants!