This project has 10 16-bit microprocessors. Each of them is an Instruction Set Architecture CPU. Each CPU has its own private memory. Each memory is 512 words deep. Each word is 16 bits wide. Six CPUs are connected to the chip boundary. Each of them accesses 8 IOs. Four CPUs are connected to a serial protocol hub. The hub has 4 SPI modules, so, each CPU is connected to an SPI module. Each SPI Ip accesses 1 IO of the chip boundary.