User Project Example

Overview

The user project is a simple counter that showcases how to make use of caravel's user space utilities like IO pads, logic analyzer probes, and wishbone port. The repo also demonstrates the recommended structure for the efabless' shuttle projects.

Features:

• 16 bit counter
• Uses 16 GPIOs
• 16 bit Wishbone bus connected to the mgmt SoC
• 16 bits Logic Analyzer

Getting Started

For more information and setup/implementation documentation visit Caravel User Project Example Github Repo