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MPW-4 Shuttle Projects

yifive_a2 public

Manikanta | https://univisiontechnocon.com/

RISC-V based sub system

ICESOC public

Nguyen Dao

Ibex Crypto eFPGA SoC

Subservient-MPW4 public

Klas Nordmark

An ASIC-adapted version of the award-winning bit-serial RISC-V processo SERV, resubmitted due to...

RRAM_testchip public

Nguyen Dao

This submission is to test rram and its programming circuit using for eFPGA

IOTestVehicle public

Staf Verhaegen

Test chip for higher speed IO pad cells

CMOS... public

Maher Benhouria

A simple rail-to-rail comparator with its bias circuitry to test the SKY130 analog design flow.

Ariel eFPGA public

Alexander Monakhov | https://engineering.phys.msu.ru/en/

This is a part of Uranus FPGA project. Our goal is to create open source configurable FPGA...

Kasirga K0 public

İsmail Emir Yüksel | http://www.kasirgalabs.com/


pifive-soc public

Anish Singhani


PLL-based... public

Jorge Marin

Time-based capacitive sensor interface using highly-digital custom building blocks

MSSRO_based_VCRO public


A high-performance, separately driven, noise-canceling, skew-based Voltage Controlled Ring...

Coriolis Test SoC -... public

Myrtle Shah

Test SoC using Amaranth; Coriolis; PDKMaster for MPW4

riscduino-R1 public

Dinesh Annayya

A arduino pin compatible RISC V Project

SAR-ADC and... public

Christoph Weiser

This submission consists of a updated 8-bit SAR-ADC, basic analog support circuitry, such as...

Ibtida-II public

Merl Uit

This submission is for Ibtida-I which was selected for the First MPW Shuttle. Due to the issues...

Space Controller public

Iván Rodríguez Ferrández

This design is a radiation tolerant UART server that can be used for low level control of...

SORIC public

Thinh Pham

A SoC with two crypto-supported RISC-V cores.

ASIC Design of... public

Uzair Ahmad | http://isb.nu.edu.pk/rfcs2/

Space application Integrated Circuits (ICs) are prone to radiation particles, which are present...

CMOS Frequency... public

Adithya Sunil Edakkadan

2.87 GHz frequency synthesizer with programmable sweep.

APPROXIMATE Multiplier public

Rana Muhammad Shahid Jamil | http://isb.nu.edu.pk/rfcs2/

This project implements an approximate multiplier for image processing applications

Sky130 RadTol Test Chip public

Javier Contreras

Test structures for the study of ionizing radiation tolerance in the Skywater 130 process.

Logic BIST public

Dinesh Annayya

Logic BIST with Scan Chain to detect struck at fault

Karplus-Strong... public

Tamas Hubai

Two string version of Karplus-Strong Guitar

REST public

Sajjad Ahmed

REST (resource efficient sram based tcam).

ieee sscs pico chip... public

Hisham Elreedy

online precheck for ieee sscs pico chip 5 of sscs21

Zero to ASIC... public

Matt Venn

Re-hardened MPW2 group submission to fix clock issues and re-submit for MPW4.

Zero to ASIC... public

Matt Venn | https://zerotoasiccourse.com

Designs from the Zero to ASIC course

CMOS only... public

Luís Henrique Rodovalho Moreira de Lima

Sub 1-V voltage supply, 3.6 uA total current, 270 nA output current, resistorless self-biased...

RAM_Generator public

Micro Electronics Research LAB (MERL)

This project is for the testing purpose. We wanted to test the memory generated using SRAM as a...

Randsack B1 public

Harrison Pham

Random number generators and PUFs. Includes fixes for compatibility with the new litex based...

YONGA-Turbo Encoder public

Abdullah YILDIZ | https://yongatek.com/

YONGA-Turbo Encoder is an implementation of a high-performance forward error correction (FEC)...

Two-Stage-CMOS-OPAMP public


This project presents the design of a two stage CMOS Operational Amplifier. This ciruit provides...

Key Value store 2 public

Giray Pultar | https://github.com/giraypultar/

A key value store using a wishbone interface, developed using migen.

SonarOnChip---8-Channels public

Krzysztof Herman


junga_soc_mpw4 public

Lena Hwang

Simple vexriscv based SoC

Karplus-Strong Guitar public

Tamas Hubai

Physically modeled guitar strings using the Karplus-Strong algorithm with some extensions by...

Updown Counter (Test) public

Pranav Dilip Lulu

A simple Updown counter for demo purpose

WaveBPF public

Heyang Zhou

A minimal dataflow architecture CPU designed in the Clash HDL.

Gbps SerDes public

Jingxiao Li

Doing Gbps wireline transceiver to exam jitter budgeting theory

4T1R Testchip public

Ganesh Gore | https://www.lnis-uofu.com/

RRAM testchip designed to evaluate 4t1r configuration. Official submission repository for google...

testchip_4tlr public

Jeff DiCorpo

Copy of of 4tlr reram project

Hilas Class Test Chip public

Pranav Mathews | https://hasler.ece.gatech.edu/

Designs created in ECE 4430 at Georgia Tech put onto a chip for testing, as well as some other...

ReRAM Test bank public

Lekan Afuye

Test structure for 1T1R ReRAM


Rana Muhammad Shahid Jamil | http://isb.nu.edu.pk/rfcs2/

This is MPW-4 submission by ICD Lab at FAST NU Islamabad. It contains LNA, Opamp, BGR, WPT module

OpAmp_DACI2021_Trapaglia public

Matias Daniel Trapaglia Mansilla | http://www.fundacionfulgor.org.ar/sitio/index.php

Operational amplifier (opamp) based on the Miller topology designed in Skywater SKY130 CMOS process.

SkullFET public

Uri Shaked | https://wokwi.com

Barebone MOSFET transistors

Azadi_II public


This project is the extended version of Azadi-SoC, which includes all of the peripherals which...

Quantum Tia 1-1 public

Jared Marchant

Our design is a high-gain, low-noise, resistive feedback transimpedance amplifier applicable to...

Current Starved VCO public

Nalinkumar S

This project presents the design of a Current Starved Voltage Controlled Oscillator. This...

FOSSi Cochlea public

Ankur Sharma

A wavelet based filter bank using switched capacitor technique.

caravel_koggeston... public

Mohammed Zakir Hussain

16-bit koggestone adder verilog implementation.