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COCOTB - VERIFICATION TB

The FOSSi Foundation

ASIC Verification

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GTKWAVE VCD/WAVEFORM VIEWER

GTKWave

Semiconductor IP Validation Services

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ICARUS VERILOG

Icarus Verilog

Semiconductor IP Verification

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IPM - IP MANAGER

Efabless

ASIC System & Board Design

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KLAYOUT MASK LAYOUT EDITOR

Matthias Köfferlein

ASIC Physical Design

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MAGIC VLSI LAYOUT EDITOR

Tim Edwards

ASIC Physical Design

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MAKERCHIP IDE

Redwood EDA, LLC

ASIC Digital Design

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MPW PRECHECK

Efabless

ASIC Verification

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NETGEN LVS

Tim Edwards

ASIC Verification

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NGSPICE - SPICE SIMULATOR

Ngspice Developer Community

Semiconductor IP Verification

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OPENLANE

Efabless

ASIC Digital Design

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OPENLANE 2

Efabless

ASIC Digital Design

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OPEN_PDKS

Tim Edwards

Technology Foundation: PDK

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TACHYON OSS CVC

Tachyon Design Automation

ASIC Digital Design

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TINY TAPEOUT CHIP DESIGN

Matt Venn

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VOLARE VERSION MANAGER

Efabless

Technology Foundation: PDK

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XSCHEM SCHEMATIC EDITOR

Stefan Schippers

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XYCE SIMULATOR

Sandia National Laboratories

ASIC Physical Design