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Icarus Verilog

Icarus Verilog

Icarus Verilog by Stephen Williams

Overview

Icarus Verilog is an implementation of the Verilog hardware description language compiler that generates netlists in the desired format (EDIF) and a simulator. It supports the 1995, 2001 and 2005 versions of the standard, portions of SystemVerilog, and some extensions.

Icarus Verilog is available for Linux, FreeBSD, OpenSolaris, AIX, Microsoft Windows, and Mac OS X. Released under the GNU General Public License, Icarus Verilog is free software, an alternative to proprietary software like Cadence's Verilog-XL.

As of release 0.9, Icarus is composed of a Verilog compiler (including a Verilog preprocessor) with support for plug-in backends, and a virtual machine that simulates the design. To view waveforms, a program like GTKWave can be used. [Wikipedia]

Icarus Verilog Documentation

Icarus Verilog documentation can be found here.

Icarus Verilog Download

The Icarus Verilog can be downloaded here.

Summary

Catalog ID

ICARUS VERILOG

Provider

Community

Vendor

Icarus Verilog

Category

Digital EDA

Price & Licensing

Pricing

Free

Attachments

Cover Image

icarus_verilog.png