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CI 2404 Shuttle Projects

Mirafra_FPU public

Mayank Varshney | https://github.com/mbits-mirafra/efabless

FPU design implemented by Mirafra Team

eFPGA-80CLB-Cinvestav public

Emilio Baungarte

eFPGA of 80 CLB developed with openFPGA, and implemented with 130nm

IMPACT_Custom_SRAM_03 public

William (Liam) Oswald

University of South Alabama Custom SRAM project 03. This project includes a 32x1024 Truncation...

chipalooza_projects_1 public

Tim Edwards

First test chip of Chipalooza projects

pd_project_cva6 public

Erwin Royson

Processor Design project cva6 tapeout

pd_proj public

Erwin Royson

cva6 tapeout

clear_update public

Jeff DiCorpo

Rerun Clear on CI 2404

tinytapeout-06 public

Uri Shaked | https://tinytapeout.com/

Tiny Tapeout 06 - Visit https://tinytapeout.com for more information on the project and how to...

6DFF-Test-Analog public

Jian Ramark Maranan

Testing the Analog Design Flow for 6 DFFs design.

FullAdder-Test-Digital public

Jian Ramark Maranan

Testing the Digital Design Flow for a Full Adder design.

pes_tlc public

Sanee Aman

Traffic Light Controller

pes_async_dff public

Shashank Sharma

Async D Flip-Flop (DFF) is a digital circuit element in electronics. Unlike synchronous DFF, it...

pes_ram_design_taepeout public

VISHNU BHARADWAJ BALASUBRAMANYA GARGESHWARI

Dual Port Ram

18demux public

Spurthi Malode

1:8 demux

pes_ripple_counter_2 public

ripple_counter design

timerdemonstration public

Matt Venn

timer demonstration

32-bit_unsigned_divider public

S R RISHAB KUMAR 2022 Batch,PES University | https://github.com/SR-Rishab/Divider_tape_out.git

GDSII of a structural 32-bit unsigned divider

cache_compression_tapeout public

Tapeout Program

PES_ADD_SUB_32 public

YAGNA VIVEK B

A 32 bit ladner fischer adder that can significantly reduce delay when compared to traditional adders

pes_plant_watering public

Ms. Spoorthi S

Plant Watering system is a digital design that takes moisture sensor as the input and decides...

pes_tflipflop_tapeout public

Vaishnavi B V

tflipflop tapeout

fibonacci public

Lalith Lochan

Fibonacci_sequence_calculator

pes_piso_tapeout public

Srinidhi

The shift register that uses parallel input and generates serial output is known as the parallel...

pes_full_subtract... public

Akarsh Hegde

pes_full_subtractor_tapeout

Readout_Array_Des... public

Sepideh Asgari | https://github.com/EMIL-YORKU/SeqSoc_Chipalooza.git

Our project aims to revolutionize DNA sequencing technology by developing a cutting-edge System...

Baud-rate-generator public

ROHITH D N

Baud rate generator tapeout repo

project-test public

IVO GAY CARAMUTI

demostration proyect

ABCDE public

Mohamed Kassem

BLA

projest_caravel_test public

IVO GAY CARAMUTI | https://github.com/efabless/caravel_user_project

this is a test to do the Submitting Precheck and Tapeout Jobs

LDPC_ENC_DEC public

Manish Mahajan

NR 5G 2_0_4 BG2

zam_zerotoasiccou... public

Mohamed Tawfik

test zam_zerotoasiccourse_test_01 SHA256