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GFMPW-0 Shuttle Projects

Game-of-Life-Cell public

Uri Shaked

Implements the logic of a single game of life cell

AS2650 public

Luca Horn

Replica of the long abandoned and forgotten S2650 8-bit architecture. Only implements a subset...

caravel_jacaranda-8_GF180 public

Cra2yPierr0t | https://cpu-dev.github.io

PicoRV & Jacaranda-8 - It's a hobby heterogeneous processor!

HyperRAM controller public

Paweł Sitarz

Project instantiates HyperRAM controller for external memory chip (8MB version) connected to...

GF180_SSD public

Nishad Potdar

This is an implementation of BCD to Seven Segment Decoder. The module takes 4 bit BCD input and...

Hash Accelerator... public

Abdul Moiz Sheikh

The project aims to deliver a dual mode hashing accelerator which is capable of high speed...

FABulous on GF180 public

Myrtle Shah

FABulous eFPGA fabric generated and taped out on the new gf180 process

Rift2Go_2300_GF180_MPW0 public

Ruige Lee

This is the simplest version of Rift2Core. Rift2300 has no L2 cache, no L1 ICache, no L2 TLB, no...

OneHot FABulous... public

Myrtle Shah

FPGA based on FABulous but using an experimental combined custom bitcell+tgate config routing element

SPI with Clock... public

Abdul Moiz Sheikh

Serial peripheral interface (SPI) is one of the most widely used interfaces between...

tiny_user_project... public

Thorsten Knoll

The historic arithmetic-logic-unit (ALU) 74181 from the 70's. Pure combinatorial with 4-bit...

TestAsyncTrimux public

Alexander Shabarshin

This is a test circuit for 3-rail async ternary selector that connects one of the 3 ternary...

ChipFlow example... public

Staf Verhaegen

Implementation of ChipFlow example SoC with 3.3V version of the c4m-flexcell standard cells.

gf180_state_machine public

Xuanjia Bi | https://engineering.virginia.edu/high-performance-low-power

This is state machine that monitors water and temperature change in a closed feedback loop.

OpenFASOC Test... public

Mehdi Saligane


SkullFET GF180 public

Uri Shaked | https://wokwi.com

Barebore transistors

SPELL public

Uri Shaked | https://wokwi.com

SPELL is a minimal, stack-based programming language created for The Skull CTF.

modulador public

susana ortega cisneros | https://unidad.gdl.cinvestav.mx/

Another test of gf180 with a synchronous modulator for another doctoral student in electronic...

OneHot FABulous... public

Myrtle Shah

reduced size version of the one-hot mux fabric

Fuzzy Wavelet GF180 public

Opensource FoodRev Projects

Wavelet Transform with pre-filters

RISCV with CNN... public

Asma Mohsin | https://tinytapeout.com

Convolution Neural Network co processor is added with RISCV to enhance the performance of...

Serv-tri-core public

Greg Davill

An award winning serial RISCV SoC from Olof Kindgren. This project incorporates 3 separate...

EduWave public

Ryan Matthew Price | https://www.utep.edu/engineering/ece/

Experimental Digital Process Blocks for Incomplete PDK

alu_paper_gf180 public

Emilio Baungarte | https://unidad.gdl.cinvestav.mx/

Testing an ALU using gf180 technology, to support a recently submitted journal article titled,...

16x4 bit dual... public

Rolf Widenfelt

16x4 bit dual port register file, with dual read ports and a single write port - perfect for the...

modulador_a public

luis adolfo luna | https://unidad.gdl.cinvestav.mx/

Test of gf180 with an asynchronous modulator, which is part of a PhD project at Cinvestav in...

Carry_Look-Ahead_Adder public

Vrushabh Damle

This is an implementation of a 4-bit carry look-ahead adder which is a fast adder. It has two...

16bit pipelined... public

Govindu Sathvik Reddy

Developed a 16bit processor having its own Reduced Instruction Set with least possible number of...

GF180MCU Test... public

Philipp Gühring | https://libresilicon.com/

Automatically generated Test Structures with the DanubeRiver Tool, to test the Global Foundries...

ISA 16-bit... public

Aloke Das

This is simple microprocessor. Instruction Set Architecture (ISA). The data bus is 16 bits wide....

Universal Shift Register public

Subash Polisetty

8-bit Universal Shift register that performs various operations based on a control input

RHBD_ALU_GF180 public

Janani Aravind

ALU-Radiation Hardened By Design

Stu154-F22-Studen... public

Anish Singhani

A group submission including several small designs contributed by students at Carnegie Mellon in...

GF180 VGA Clock public

Matt Venn | https://zerotoasiccourse.com

My VGA clock rehardened for GF180

riscduino pxt1 public

Dinesh Annayya

Riscduino Peripheral Extension Chip Set-1

GF180MCU-C... public

Philipp Gühring | https://libresilicon.com/

This is a second test-design which provides several automatically generated standard cells...

matrix_multiply public

Komal Gupta | https://www.iiti.ac.in/

2x2 Matrix multiplication of inputs of 8 bits each . Used for solving AC network equations in...

Pyramiden Core public

Brown Deer Technology | www.browndeertechnology.com

This is a processor design that evolved from a tiny tapeout submission. The core implements a...

GF180 Pulse... public

James Tandon | https://www.csueastbay.edu

A basic pulse with modulation core with 8 PWMs controled by a wishbone bus slave interface. The...

5bitsMulti-gf180 public

Jorge Angarita Pérez

A custom 5-bit multiplier

GF180 Russell public

Russell Friesenhahn

Matt Venn's famous VGA clock with SPI control

GF180MCU-C... public

Philipp Gühring | https://libresilicon.com/

This is a test-design which provides several automatically generated standard cells directly...

unigate-gf public

Tamas Hubai

Implement any combinatorial logic on 4 inputs by wiring up the pins the right way

Crypto Accelerator V3 public

Anish Singhani

Third iteration of open-source cryptography core implementation

SumMult5_3_GF180 public

Nicolás Orcasitas Garcia

Small digital circuit that calculates the sum of the multiples of 3 and 5 until a previously...

tiny_user_project... public

Anish Singhani

ASIC implementation of the iconic Beep Boop traffic light at Carnegie Mellon University...

SuSoC1 public

Aedan Cullen


VerilogBoy public

Wenting Zhang

VerilogBoy Game Console SoC

Rivest Cypher 4 public

RAHUL SREEKUMAR | https://engineering.virginia.edu/high-performance-low-power

The Rivest Cypher 4 is a stream cipher algorithm developed in the 1980s, remarkable for its fast...

game of live... public

Miles Segal

calculates state of cell based on state of neighbors

Space Shuttle GF Node public

Iván Rodríguez Ferrández

The main goal of this project is to assess the reliability of the Global foundries 180nm...

rift2fake_test_gf180_MPW0 public

Ruige Lee

There is a LFSR in it.

Christmas tree... public

Julien OURY

Christmas tree controller (MPW5 ReRun)

Ophelia-eFPGA public

Egor Lukyanchenko

Uranus eFPGA with nonvolatile config in eFuse array.

Advanced... public

Vijayan Krishnan | https://www.chipwaretechnologies.com/

The Advanced Encryption Standard (AES) is a symmetric block cipher chosen by the U.S. government...

LFSR public

Maximilien Dagois

LFSR 8-bit using DSLX

Option23 public

bitluni | https://bitluni.net

Pesistence of vision display character ROM and grphics driver

DAC-Digital to... public

Vijayan Krishnan | https://www.chipwaretechnologies.com

Digital to Analog Converter (DAC) is a device that transforms digital data into an analog signal...

GF180 demo public

Matt Venn

A demo for GF180

fiboncci_gf180 public

Nestor Matajira

Returns the nth number of the fibonacci sequence

divider public

Laura Patricia Garcia Tiscareño | https://unidad.gdl.cinvestav.mx/

This is a clock divider of 2, 4, 8, 16, 32, 64, 128, 256, 512, and 1024. This project will help...

posoco2000_gf180 public

Uriel Jaramillo Toral | https://unidad.gdl.cinvestav.mx/

This is a small project that provides the necessary output pins to display the word posoco2000...

TestFlipFlops public

Alexander Shabarshin

This project is testing Wokwi to GF180 path and having a number of basic triggers to try, namely...

MicroMotorController public

Joshua Stevens

Half H Bridge driver controller for micro motors

Microwatt GFMPW0 public

Anton Blanchard

Microwatt is a 64 bit OpenPOWER core written in VHDL. This version doesn't include an FPU due to...

gf180nmdemo1 public

Dr Mehdi Khan


Sushenka public

Jan Patrovský

General purpose hash accelerator/cracker.

tiny_user_project... public

Johan Euphrosine (proppy)

Test project based on https://github.com/proppy/tiny_user_project

rift2fake_test_gf180 public

Ruige Lee

There is a LFSR in it.

16-byte RAM public

Debayan Mazumdar

This project implements a RAM of 16 bytes using structural modelling. The components used are a...

ChipFlow example... public

Staf Verhaegen

Implementation of ChipFlow example SoC with 5V version of the c4m-flexcell standard cells.

GF180MCU Large... public

Philipp Gühring | https://libresilicon.com/

Automatically generated Test Structures with the DanubeRiver Tool, to test the Global Foundries...

Hack SoC for GFMPW-0 public

Maximo Balestrini

Hardware implementation of the Hack Computer from the Nand to Tetris courses

tiny_user_project... public

Johan Euphrosine (proppy)

TinyTapeout design implementing a Population count using XLS: Accelerated HW Synthesis toolkit.

Signed 8-bit Multiplier public

Muhammed Ceylan Morgul

An 8-bit multiplier, with main logic mostly combinational, holds input with registers.

tiny_user_project... public

Thorsten Knoll

Wokwi driven testdesign which implements a 8x8 bit serial programmable, addressable and playable memory.

Artificial heart public

Dr Mehdi Khan | www.upplysningavancez.com

Project of Artificial heart

GF180 7segment... public

Matt Venn | https://tinytapeout.com

Displays 'TinyTapeout' on the 7 segment display

PDM and dice GF180-MPW0 public

Harry Snell

Basic digital designs (PDM core and a dice using LFSR)

Waveform... public

Leo Moser

A generic waveform generator divided into stimulus and driver units that can be arbitrarily...

gf180-FiveGuys public

Jerry Yin | https://engineering.virginia.edu/high-performance-low-power

This is a design with five 4-bit up-counters for monitoring the voltage changes

caravel_gf180_kog... public

Vision-VLSI Industry PVT. LTD.

16-bit koggestone adder Verilog HDL implementation.

MCU solar public

Filippo Carastro

A starting project for a future solar inverter processor.

CollatzGF180 public

Daniel Barrios

Small Test Digital Project that calculates the orbit of a N number using the Collatz Conjecture

reversible_progra... public

Sai Charan

Quad 3-input Fredkin gate IC which can be programmed into the 3 primitive logic gates - AND, OR and...

32-bit binary counter public

RAHUL SREEKUMAR | https://engineering.virginia.edu/high-performance-low-power

This is a counter with clock, reset, io_out.