This is a test circuit for 3-rail async ternary selector that connects one of the 3 ternary inputs to 1 ternary output where every ternary signal is represented by 3-rail binary bus that may be in 1 of the 4 states: - all rails grounded - NULL state (no data); - only N-rail is high - Negative state of data (-1); - only O-rail is high - Zero state of data (0); - only P-rail is high - Positive state of data (+1). Any other state when 2 or more rails are high is considered a faulty state. Circuit has Muller C-gates in every channel storing intermediate states that is cleaned by resetting the circuit by applying NULL state to all inputs or making Reset input high temporarely.
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