master miee
demo
Philipp Gühring | https://github.com/thesourcerer8/gf180_stdcelllib_1
This is a test chip which contains a bunch of digital logic cells that have been automatically...
master miee | https://github.com/miee/micro_irritating_maze
Miee-demo SoC shuttle task
Andrea Mifsud
NA
Anish Singhani
Multi-project submission including student designs from Fall 2023 CMU course 98-154 Intro to...
Emily Ocon
ADA - Digital demodulator test project
Abdul Moiz Sheikh
This project gives a implementation of a opensource matrix convolution The design has two sub...
Kenji Kise | https://github.com/kisek/rvcore_chip2
We are developing an optimized RV32I processor named RVCoreP, adopting five-stage pipelining...
Egor Lukyanchenko | https://github.com/egorxe/ophelia_fpga_openmpwgf1
Uranus eFPGA with nonvolatile config in eFuse array. GFMPW1 rerun with fixes.
Miho Yamada
test
Jeff DiCorpo
This is a demo project for GFMPW-1
Riku Anan
In my project, I designed a 10-bit SAR ADC. To accommodate digital inputs, I added a CDAC...
Antonio Karam | https://github.com/AntonioKaram/Final-Project-Scrambler
Our final project is an implementant of a Linear Shift Feedback Register (LSFR) in verilog.An...
Shahzaib Kashif | https://github.com/merledu/magmasi_caravel
Hardware accelerator developed in CHISEL HDL specifically for accelerating Generic Matrix...
Simone Corbetta | git@github.com:scorbetta/CORTEZ1.git
The `CORTEZ` design implements a simple Neural Network trained to recognize 3 vowels (`o`, `u`...
David Simonetti
Our project performs an RSA encryption of an 8-byte input and output the result. The public key...
MengCheng
DES encryption & decryption
Thorsten Knoll | https://github.com/ThorKn/J1Asic
This is the reimplementation of a tiny stack based CPU, named J1. Stack based CPUs were used a...
Anton Maurovic
Multiple muxed designs/experiments assembled by Zero to ASIC Course participants (GFMPW-1)
Nicholas Phipps
Single Cycle (almost complete) RV32I written in TL-Verilog from LFD111x
David Burnett
Baseband and digital processing for a variety of projects in the WEST Lab.
M Naveed
Coming Soon
Luca Horn | https://github.com/AvalonSemiconductors/AS2650
Re-submission of last year’s AS2650 project. Now without processor bugs and more I/O.
Hisham Elreedy
Advanced Encryption System (AES) Accelerator
Juan Diego Garcia
1 kB SRAM made with OpenRAM.This memory has a word size of 8 bits and an total of 1024...
K A Gaganashree | https://github.com/hw-user0/caravel-efabless.git
Simple Design Implementation of FIR Low Pass Filter and Moving Average Filter
James Meech
This is a more advanced project built using the same method as:...
POOJA BENIWAL | https://github.com/ndcliiitd/tapeout_ANN.git
ANN (RTL to tapeout)
Aidan Oblepias
This repository contains the Verilog implementation of a signal parity checker designed to be...
Anish Singhani
Hierarchical version of 16 student designs from the course 98-154 Intro to Open Source Chip Design
Martin Sauter | www.unibw.de/etti
We designed a couple of teststructures for electrical characterisation of bipolar transistors in...
Emilio Baungarte
This project develop an eFPGA whit 2x2 CLB
M Naveed
Soon.
M Naveed
Soon
Ethem Buğra ARSLAN
BLDC Motor controller using PID algorithm with autotuning option. Designed at HU_MNS_Lab by Batu...
Abdul Moiz Sheikh
This project gives a implementation of a convolution engine. The design has two sub designs A...
Harsh Rajeshbhai Vagadiya
The continuous progress in Deep Neural Network (DNN) models, marked by their escalating...
Thorsten Knoll | https://github.com/ThorKn/AudioChip
An electronic instrument is the goal of this project. AudioChip will become a sound producing...
M Naveed
In-Progress
Steven Conaway | https://github.com/jbechte2/nd-blindhangman-efabless
Our final project for the Digital Integrated Circuits class at the University of Notre Dame is a...
Jalisco On Chip | https://github.com/dsp8bit/DDS_POLY_GFMPW1.git
The Direct Digital Synthesizer (DDS) based on the polynomial approximation technique is a module...
Karthik Mahendra
Stabilising the current, voltage of the solar panel under controlled temerature
Anish Singhani
multi project submission
Thomas Jager
An MMIO accelerator for matrix-by-vector multiplication for computer graphics
Danruh Ryan Tarog Lasta
TBA
LeoLiang
An_analogy_of_SZMC_line1_light_map
Amro Tork | https://github.com/mabrains/gf180mcu_riscv_soc
Implementation of RISC-V MCU for small projects.
Lydia Csaszar | https://github.com/lcsaszar01/Signal_Sages/tree/main
This project is based on the examples in section 2.4.5 of Digital Electronics 3: Finite-state...
Luca Horn
Multiple projects from multiple participants all on one die! Selected design gets access to the IO ports.
Kate Mealey | git@github.com:lcsaszar01/Signal_Sages.git
This chip models the behavior of a traffic light in a four-way intersection.
Paola
Dynamically Adaptive Accumulator suitable for neural network accelerator. It is based on an...
Paras Dewangan
Hardware implementation of ANN
Zach Vincent
Four-bit input traffic signal controller that outputs an 8-bit representation of a four-way...
Ruige Lee
test upload
Johan Euphrosine | https://github.com/proppy/xls-tapeouts
Group submission with example designs from https://github.com/google/xls.
chikkaraju arun
vjhkv
Tamas Hubai
GF180 ports of: ROTFPGA v2 in two sizes, TOTP, unigate-sky & microtapeout
Ahsan Ali
In Progress (coming soon...)
David Zheng
Build a decently fast sampler in CMOS
Noritsuna Imamura | https://github.com/noritsuna/micro_irritating_maze
This is a maze game played with tools using semiconductor chips before bonding. Specifically,...
Russell Friesenhahn | https://github.com/russellfriesenhahn/gf180-mpw2/
Programmable 10-tap FIR filter with configurable thresholding and snapshoting capabilities
Thomas Lewis
An array designed to evaluate the stability and reliability over various physical environment of...
Byron Lathi | https://git.byronlathi.com/bslathi19/quite_okay_accelerator_synth
A pipelined QOI encode/decode accelerator designed.
Piotr Wegrzyn | https://github.com/piotro888/ppcpu_caravel
Pipelined microprocessor with custom RISC architecture! (with caches and exported full system bus)
KAI ISHI
This project is a compilation of ISHI-KAI members' individual analog circuit projects for OpenGFMPW-1.
Will Adelman
Dynamic CGRA-based accelerator prototype for RISC-V.
Greg Davill | https://github.com/gregdavill/gf180-mpw1-frosty-ferret
Litex based SoC with Hyperbus interface
Uriel Jaramillo Toral | https://aguascalientes.tecnm.mx/
The primary objective of this project was to impart knowledge about the fundamentals of...
Leo Moser | https://github.com/mole99/leosoc-gfmpw-1
A simple dual-core SoC with a range of true random number generators as payload.
Dinesh Annayya | https://github.com/dineshannayya/riscduino_dcore_gf180.git
Riscduino core Target to GE180nm
ANDREA FASOLINO
An accumulation algorithm to adapt multiplier results to fixed width of the adder
Riku Anan
Japanese student
Dinesh Annayya
Riscduino Peripheral Chip set target 180nm
Omar Abdeldayem
Digital PLL or maybe more
Miles Segal | https://github.com/nfjesifb/Spiking_Neuron_Cluster
Asynchronous digital neuromorphic network build from leaky integrate and fire neurons. In the works!
Alexis Leonel Matwejzuk
PlarkZen I First Edition
Navaneeth Bhardwaj
This is a RiscV SoC based on the OpenHW group's CV32E40P CPU.
Renaldas Zioma | https://github.com/rejunity/tt05-spiking-neural-net
Neural network on-chip design
Alwin Shaju
Water purifier water level indicator using sensor even though it is iot project we are first...
Lê Đức Hùng | https://github.com/duchungle/present
The lightweight cryptography cores were implemented consisting of PRESENT (lightweight block...
M Naveed
Multi Projects Chip: For Cryptographic Core operations and VGA Display
M Naveed
In Progress
Spurthi Malode
1:8 demux
Fan Zhang
simple_riscv practice
KAMIL
pes_ic
ripple_counter design
Jorge Angarita Pérez | https://github.com/Gior-gio/ADC_LogiCompilation-gf180
Compilation of 3 different Digital Logic Circuits topologies for ADC control: Flash (3-bit...
Abdul Moiz Sheikh | https://github.com/AbdulMoizSheikh1/Crypto_blake2s.git
The project presents a implementtion of Blake2s cryptographic algorithm on opensource asic...
Alwin Shaju | https://github.com/alwinshaju08/IIITB_Waterlevel_detector.git
It is a prototype for water purifier which has function of iot but we have implemented on the...
tapeout program
Azeem Gadkari
traffic light controller
Uday M
A "reverse vector" generally refers to a data structure or array where the elements or...
Pavan Talegaon
The primary goal of this project is to provide you with a structured environment for simulating...
Gian Domenico Licciardo
it is to try te design flow
Angel Trujillo
ASIC Implementation for LCD Controller.
Connor Scott
Test project for the efabless wafer
Aloke Das
This project has 10 16-bit microprocessors. Each of them is an Instruction Set Architecture CPU....
M Naveed
Cryptographic Core AES Implementation with other Projects
Herbert T
Jtag SPI controller
Joshua Stevens
Controller to manage up to 32 different half h-bridge at the some time.
Abdul Moiz Sheikh
This project gives a implementation of a opensource convolution accelerator The design has two...
Prakhar Singh
This projects consists of the design of a pixel consisting of individual RGB LED's which can be...
Mathis Salmen
The Linux-capable, out-of-order SoomRV rv32i core on GF180MCU.
Renuka Prasad | https://github.com/renukaprasads/RiscMicro.git
A simple Risc Microcontroller
Kanagaraju Ponnusamy | https://github.com/kanak1025/rtc_gf180.git
Real Time Clock targeted GF180
Toru Homemoto
ishikai-gds-test-homelith
Gonsolo | https://github.com/gonsolo/caravel_gfmpw1
A simple diffuse shader as used in rendering applications, but this time hardwired in silicon.
Abdul Moiz Sheikh
The project presents a area efficient implementation of a high speed matrix convolution engine....
Matthew Morrison | https://github.com/mmorri22/nd-mips8-efabless
Demo and Student Projects for Fall 2023 CSE 30342 Digital Integrated Circuits at the University...
Yatharth Agarwal
The Advanced Encryption Standard (AES) is a widely used symmetric encryption algorithm. This...
Alejandro Silva Juárez
control_system
Emma Cristina Mascorro Guardado | https://github.com/ECMG19/OQPSK_S_GFMPW1
OQPSK MODULATOR
Uriel Jaramillo Toral | https://github.com/urielcho/OQPSK_A_GFMPW1
The Asynchronous OQPSK Modulator, designed at CINVESTAV-IPN, offers efficient OQPSK modulation...
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