Sepideh Asgari
Nanopore-based DNA sequencing is a unique, scalable technology, utilized to identify nucleotides...
Dr. Naushad Alam | https://www.amu.ac.in/faculty/electronics-engineering/naushad-alam
In this project we intend to design and characterize a 4 - bit Flash ADC using SkyWater 130 nm...
James Thomas Doyle | http://cocochip-asic-design.com
An ultra-low power standalone wireless temperature sensor chip deriving power from ISM band RF...
Andalib Nizam
The goal of this project is to design and fabricate a low power low cost electrochemical sensing...
Roshan Mohyeldeen | https://www.fue.edu.eg
The goal of this project is to design an analog baseband section suitable for 60 GHz receivers.
Anirban Mukherjee
A high speed three stage operational amplifier using a modified feed-forward compensation...
Ashutosh Kumar | https://soe.cusat.ac.in/
In this work, we aim to minimize the startup voltage of a batteryless single inductor boost...
Muhammad Waleed | http://isb.nu.edu.pk/rfcs2/
This is a proposal for IEEE PICO design contest. A Switched capacitor DC-DC boost converter for...
Hamdy Elshehaby | https://www.fue.edu.eg/
Design of Gilbert cell down-conversion mixer that can be used in wireless receivers to...
Pranav Dilip Lulu
This design contains a Phase Locked Loop which can be used in high frequency applications. The...
i212435 Shaheer Ashraf | http://isb.nu.edu.pk/rfcs2/
This is a proposal for IEEE PICO design contest. A Matrix Multiplier based on Systolic Array...
Amir Victor | https://services.fue.edu.eg/
Design a Receiver Front-End of CMOS Cascode Common Source Stage with Inductive Degeneration Low...
Rai Muhammad Danish
John von Neumann architecture of computation is slower than Systolic Array based architecture ...
Robin Roy
building a 12bit Digital to Analog Convertor using R2R method. With a reference voltage of 3.3 Voltage.
Leonardo Amorese Gallo Gomes
The goal is to build a demonstrator chip in the 10 mm² user project area to assess the...
Mudassir Ali | http://isb.nu.edu.pk/rfcs2/
This is a proposal for IEEE PICO design contest. A novel bandgap voltage reference with...
Devadut S Balan
Our goal is to design an Analog Accelerated Vector Multiplier which is capable of handling...
DongSeon Kim | http://niftylab.github.io
We design a transmitter with a feed-forward equalization capability to compensate Inter-Symbol...
Rida Iftikhar
In this project, a fully differential, continuous time delta sigma modulator with Cascade of...
Aubrey Beal
This project aims to create a 10 bit SAR ADC with the goals of extending useful mixed-signal IP...
Abdul Wajjid | http://isb.nu.edu.pk/rfcs2/
This is a proposal for IEEE PICO design contest 2022. A low power subthreshold SRAM cell is...
Jorge Marin
This project aims to design and implement a DC-DC buck converter based on the Three-level Flying...
Ava Hedayatipour | https://www.csulb.edu/
The goal of this research is to take advantage of today's technology in the implementation of...
Nicolás Calarco | https://eamta.ar
This project has two main goals, separated into two big sub-projects. The first goal is to...
Anirban Mukherjee
A high speed three stage operational amplifier using a modified feed-forward compensation...
Stefanos Kontogiannis
This project aims to evaluate a novel non-PWM boost converter for extending the battery life in...
Maximiliano Cerda | https://github.com/MaxRCC/MixPix.git
Abstract: We propose a development of a mixed signal circuit, which processes signals from...
Daniel Limbrick | https://sites.google.com/view/adept-laboratory
Multiple microcontroller cores will be placed on the same die, each with a reliability-aware...
Ali Sabir | http://isb.nu.edu.pk/rfcs2/
A low power approximate processor for IOT intelligent edge nodes applications. The proposed...
Sidra Naseer
Custom design of eFpga with parallelism to improve throughput. During the bitstream loading...
Serdar Ünal | https://tutel.bilgem.tubitak.gov.tr/
32-bit Brent-Kung adder for 2022 IEEE Solid-State Circuits Society (SSCS) Platform for IC Design...
i212437 Abdul Moiz Sheikh | http://isb.nu.edu.pk/rfcs2/
Various techniques are utilized today to secure sensitive data from unwanted access; the most...
Sonia Kiran | http://isb.nu.edu.pk/rfcs2/
Data encryption is necessary in military as well as in other security concerned applications....
Amr Tawfik | https://www.minia.edu.eg/Minia/home.aspx
A CMOS 915 MHz power oscillator test chip consists of a driving cross coupled LC oscillator...
Muhammad Jawad Shakil | http://isb.nu.edu.pk/rfcs2/
In this work, a fast transient response on-chip inductor based DC-DC converter is proposed. The...
Hamza Saleem | http://isb.nu.edu.pk/rfcs2/
This is a proposal for IEEE PICO design contest. Conventional radio transceivers operate in...
Rishabh Verma
This project intends to design a 4-bit Flash type ADC for low-power applications.
Redwan
This project aims to build an ASIC for a smart garden. The ASIC can be divided into three parts,...
John Hu | https://ceat.okstate.edu/ece/
A three-part lab for undergraduate students to learn open-source analog IC design. (1) CS stage...
Muhammad Dawood Asghar | http://isb.nu.edu.pk/rfcs2/index.htm
In this proposal we have proposed Spatial Sigma-Delta ADC for MMIMO 5G applications with a...
Gowtham
A low power and high-speed approximate divider using restoring array architecture has been...
Jehan Taraporewalla
To implement our 60 GHz triple push CMOS oscillator we will use a star network of three...
Hareem Rashid | http://isb.nu.edu.pk/rfcs2/
In an embedded system, multiple communication protocols are used in order to transfer data, such...
Mostafa Mohmmad
The goal of this project is to design a fully differential folded cascode OTA with a common mode...
Talha Bin Azmat | http://isb.nu.edu.pk/rfcs2/
We propose the design of a high-speed accelerator that uses Resistive Random Access Memory...
Akshaya Balakrishnan
A boost converter is known as step up converter which steps up voltage from its input to its...
vanshika tanwar | https://gnindia.dronacharya.info/
CMOS devices had been scaled down to be able to reap better pace, performance, and decrease...
Srinivas Bangalore Seshadri | https://sites.utexas.edu/piercethinking/
A Phase Locked Loop (PLL) has many applications such as frequency synthesis, clock-data recovery...
Christof Gindu
The goal is to realize a hybrid form of the PLL so that the advantages of both “worlds” can be...
Affin D Samuel
This work presents a Third order SC Cheybshev LPF in a single and short circuit for vital sign...
Rai Muhammad Danish
A memory accessing system may perform better depending upon the type of random-access memory...
Eunkyung Ham | https://github.com/Eunkyung-Ham/caravel_eFPGA_interface
In this project, we considered ways to improve the use efficiency of eFPGA by adding a structure...
Liban Hussein
Continuous monitoring of biopotential signals is necessary for recording neural activity through...