A compact batteryless low-startup boost converter

1. Introduction:

Thermoelectric generators devices have been widely used in Internet-of-Things (IoT) applications. The thickness and dimension limit the temperature gradient across the device (from 0.5K to 2K) and the effective temperature coefficient (from 50mV/K to 100mV/K) [1]. Generally, the output voltages of these devices are few tens of millivolts which are not suitable to power many IoT applications. Hence, a low startup, low operating voltage boost converter is essential to support these IoT applications. Compact systems can be realized if built-in batteries and off-chip components are avoided. Such attempts may lead to relatively low efficiency or output power. Component sharing is a compromise that simultaneously results in optimum efficiency and moderate compactness.

The boost converter proposed in [2] is an example of a circuit that shares components. The circuit is initially activated by a startup converter and later uses the main converter to achieve high efficiency. The startup and the main converters share the same off-chip inductor for their operation. Thus, the circuit ensures a battery-less conversion and the inductor sharing reduces the size of the converter. The self-startup is guaranteed at 190 mV with the help of a ring oscillator which is designed using inverters. With zero-current switching (ZCS) [3] and a maximum power point tracking technique, the main converter achieves an efficiency of 60% and a maximum power output of 400 µW. After the startup, the circuit can maintain its operation even with 50 mV over a temperature range, from -30°C to 80°C. The wide temperature range makes the circuit suitable for extreme conditions.

Table I. Performance comparison of self startup boost converters

	[1]	[2]	[4]
Startup voltage	70 mV	190 mV	100 mV
No of off-chip inductor	1	1	0
Minimum input voltage	70 mV	50 mV	-
Output voltage	1.25 V	1 V-1.6 V	0.76 V
Output power	17µW	400 µW	6.6 µW
Peak efficiency	58%	60%	33%
Temperature range	-	-30°C to 80°C	-
MPPT	No	Yes	No
Die area	0.6 mm2	0.17 mm2	2.18 mm2
Process	130 nm	180 nm	65 nm

The circuit has been realized in a 180 nm CMOS process and the performance comparison with the other-self startup converters is given in Table I. Though the startup voltage of this circuit is higher than the other self-startup converters [1] [4], the efficiency and the output power are better than theirs. The startup voltage can be reduced when the circuit is realized in an advanced technology due to the reduced threshold voltages and the gate capacitances [2]. Hence, we would like to design this circuit in a 130 nm process to achieve a minimum startup voltage while maintaining the other advantages (high efficiency, high output power, and wide temperature range) the circuit has already achieved.

2. Batteryless inductor-sharing boost converter:

The design of the low-voltage, battery-less inductor-sharing boost converter is inspired by the work reported in [2]. Fig 1 shows the overall architecture of the boost converter. The overall architecture of the boost converter consists of a startup converter, a main converter, a maximum power point tracking (MPPT) block, and a voltage monitor. The converter operates in startup and main boost modes. Both the modes need an inductor. Hence, the inductor can be shared. Inductor sharing between these modes reduces off-chip components. Input voltages greater than a threshold charge a capacitor. When the voltage of this capacitor is sufficiently large enough, the main boosting converter is enabled and the startup converter is disabled. Zero current switching and the MPPT tracking guarantee a high efficiency to the boost converter. The MPPT tracks the impedance of the thermoelectric devices and use this knowledge to ensure maximum power transfer. Power loss of the circuit is contributed by the parasitic resistances of the MOSFETs, clock generator circuits and the inductor loss.

Fig. 1. The architecture of the boost converter [2]

1. Startup boost converter:

The startup boost converter has two main components which are the ring oscillator and the clock booster.

2.1.1 Ring oscillator:

The first stage of the startup converter is the ring oscillator. As the oscillation needs to occur at a low voltage, redundant inverters are preferred for the ring oscillator. The schematic of a redundant inverter is shown in Fig 2.

Fig 2. Schematic of the redundant inverter [2]

A redundant inverter configuration uses four CMOS inverters, and two stages of multiplexers which result in strong logic ‘1’ or strong logic ‘0’ according to our inputs. This is achieved by sizing the transistors appropriately. Large width PMOS and NMOS (i.e. having high W/L ratio) transistors lead to strong pull-up and pull-down paths. Large width transistors reduce the resistance and result in desired outputs.

Multiplexers select the outputs based on the inputs to the inverters. If the input is logic ‘0’, the upper output will be selected. The PMOS turns ON and the NMOS remains OFF. If the logic is ‘1’, the lower output will be selected. Here, the PMOS is OFF and the NMOS is turned ON. When the redundant inverters are cascaded, the output is passed to the next stage. Similar operation is performed in the next stage also.

Consider a logic ‘0’ input to the redundant inverter. The first (placed at the top) inverter has a strong pull up and outputs a strong logic ‘1’. The second inverter (the inverter below the first inverter) also outputs a logic ‘1’ but it is less close to the supply voltage compared to the first inverter. Similarly the outputs of the third and fourth inverters can also be analyzed. Since the fourth inverter (placed at the bottom) has a weaker pull up, the output logic ‘1’ is less strong than the first inverter. The multiplexers select the strong logic ‘1’ output from the first inverter as the final output. Similar analysis can be done for the logic ‘1’ input also, which results in a strong logic ‘0’output.

Ring oscillators can be built by cascading the redundant inverters. The internal nodes of the ring oscillator have strong pull-up and pull-down paths to enable oscillation at low supply voltages. However, the voltage produced by the oscillation is not sufficient enough to turn ON a transistor in strong inversion. The problem can be solved using clock boosters

2.1.2. Clock booster:

The clock booster receives the input from the ring oscillator and boosts it up to a voltage where it could turn ON and OFF a transistor in the strong inversion region. The circuit diagram of the clock booster is shown in Fig 3.

Fig 3. Circuit diagram of the clock booster [2]

Suppose a logic ‘0’ input is applied to the clock booster. It passes through the inverters and helps node ‘X’ to get ^VI^. After the rising edge of the input clock, node ‘X’ is boosted to 2VI. By cascading another similar structure, the voltage at CKP will reach 3^VIoutput. Similar explanations are valid for CKN as well.

2.1.3. Working of the startup converter:

The startup converter works in two phases. The output of the startup converter is a control signal which helps in charging the inductor. During the charging mode, the control signal turns ON a path for the current to flow from the input to the ground through MN3 in Fig. 4. This current flows through an inductor and charges it. During the other phase, the inductor discharges, and the charges are transferred to capacitor C_S. The capacitor voltage increases with the charge transfer from the inductor. When the capacitor voltage reaches the desired voltage level, the main converter is turned ON. Once the main converter is ON, the startup converter is disabled.

Fig 4. Startup boost mode [2]

2. Main converter:

The main converter consists of a clock generator, a zero-current switching controller and a voltage monitor circuit. The clock generator outputs the required control signal to switch the startup converter between the charging and discharging mode. A ZCS condition ensures the maximum efficiency. A negative-flowing inductor current does not contribute to the power transfer into the converter output. Hence, the high side switch (MP4 in Fig 5) needs to be cut off once the inductor current crosses zero. The ZCS controller compares V_X and the output voltage (V_O). If V_X is larger than V_O, the ON time of the high side switch is increased. Similarly, if V_X is smaller than V_O, the ON time of the high side switch is decreased. When V_X approaches V_O, the ZCS condition happens. As the ZCS condition is obtained with the help of feedback, the circuit shows an inherent robustness against temperature variations. The voltage monitor circuit cuts off the main converter once the output of the converter reaches the reference and regulates the output in the desired voltage range.

Fig 5. Main boost mode [2]

2.2.3. MPPT

Maximum power to the load is ensured if the load resistance (R_EQ) and the source resistance (R_T) are equal. Since R_T varies in different environments, R_EQ can be designed to track the changes in R_T . This is possible when R_EQ is defined based on a clock frequency. Based on

R_EQ=[2Lf_S]/[D1²] ….. (1)

where L is the inductance and D1 is the duty-cycle of the clock used. Here, the resistance R_EQ is dynamically changed by controlling f_S in the feedback loop. Thus, the MPPT obtained here is variation-tolerant.

During the sampling phase, the load is disconnected from the source. One half of the open circuit voltage is sampled to a capacitor C₁. During the comparison phase, the load is reconnected to the source and the average of the input voltage V_I is compared against the sampled voltage. A counter is used to record the comparison result during the counting phase. If V_I is larger than the sampled voltage, the counter counts down and vice versa. The output of the counter is used to choose the load capacitance of the ring oscillator, thus the switching frequency, f_S. The range of the source resistance determines the tuning resolution.

3. Proposed approach:

The boost ratio of the circuit given by [2] is

B=(V_S/V_I)=1+ V_ID²T_s/(2LI_O) …. (2)

where V_I, D and T_S are the input voltage, duty cycle of the clock signal associated with the charging and discharging of the inductor and clock period, respectively. L is the inductance used and I_O is the output current. V_S is around 600 mV for the circuit realization in the 180 nm process. The clock period depends on the propagation delay of the inverters used in the ring oscillator. The supply of these ring oscillators are less than 100 mV. In the subthreshold region, the propagation delay depends on the load capacitance (C_L), subthreshold slope (S_S) and off current (I_Off) and the parameters follow the relation given below [5],

t_P ∝ C_L S_S /I_Off …… (3)

When the design is translated to a 130 nm CMOS process from 180 nm process, around 28% reduction in the load capacitance is expected. The reduction in load capacitance is estimated based on the area of the devices. From the typical values provided in [6], nearly a 2% increase in the subthreshold slope and 25% increase in the off current are used to predict the delay. With the considered values, around 42% decrease in delay is predicted for the subthreshold operation in the 130 nm technology compared to the 180 nm technology. Similarly the process migration will reduce V_S to around 400 mV. This reduction is based on the supply (and the threshold) voltage scaling. Substituting these expected changes in (1) reduces the input voltage required to half the value used in the 180 nm technology. Here, all other values are assumed same as the 180 nm realization. As 190 mV is the required input voltage in the 180 nm process, we may expect around 95 mV input voltage in the 130 nm process.

4. Summary:

In this work, we aim to minimize the startup voltage of a batteryless single inductor boost converter that is targeted for thermal energy harvesting. Based on the technology scaling, the design reported in [2] is expected to result in a small startup voltage in a 130 nm technology. The targeted specifications for our design are given in Table II.

Table II. Target specifications for our design

References:

[1] J. Goeppert and Y. Manoli, ``Fully integrated startup at 70 mV of boost converters for thermoelectric energy harvesting,’’ IEEE J. Solid-State Circuits, vol. 51, no. 7, pp. 1716-1726, Jul. 2016.

[2] M. Chen, H. Yu, G. Wang, and Y. Lian, ``A batteryless single-inductor boost converter with 190 mV self-startup voltage for thermal energy harvesting over a wide temperature range,’’ IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 66, no. 6, pp. 889-893, Jun. 2019.

[3] J. Kim and C. Kim, ``A DC-DC boost converter with variation-tolerant MPPT technique and efficient ZCS circuit for thermoelectric energy harvesting applications,’’ IEEE Trans. Power Electron., vol. 28, no. 8, pp. 3827-3833, Aug. 2013.

[4] H. Fuketa, S-I. O’uchi, and T. Matsukawa, ``Fully integrated, 100-mV minimum input voltage converter with gate-boosted charge pump kick-started LC oscillator for energy harvesting,’’ IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 64, no. 4, pp. 392-396, Apr. 2017.

[5] S. Hanson, M. Seok, D. Sylvester, and D. Blaauw, ``Nanometer device scaling in subthreshold logic and SRAM,’’ IEEE Trans. Electron Devices, vol. 55, no. 1, pp. 175-185, 2008.

[6] D. Bol, R. Ambroise, D. Flandre, and J.-D. Legat, ``Interests and limitations of technology scaling for subthreshold logic,’’ IEEE Trans. Very Large Scale Integr.(VLSI) Syst., vol. 17, no. 10, pp. 1508-1519, 2008.

Team Members

1. Mr.  B. Bhuvan: Team Advisor and mentor 
   Assistant Professor  National Institute of Technology Calicut
2. Ashutosh Kumar: Team leader 
   B.Tech Electronics and Communication Engineering,
    school of engineering, cusat
3. Kananathan Kajaruban : Member
   B.Tech Electronics and Communication Engineering
   National Institute of Technology Calicut
4. Bhawna Gupta: Member
   M.Tech (Power Electronics), National Institute of Technology Calicut
5. Kamta Kesharwani: Member
   B. Tech (Electronics and Communication Engineering), National Institute of Technology Calicut.
6. Akshat Sinha : Member
   B. Tech (Electronics and Communication Engineering)
    school of engineering cusat