This project has two main goals, separated into two big sub-projects. The first goal is to fabricate the final student projects of the 15th Argentine School of Micro-nanoelectronics, technologies and applications, EAMTA 2002 (www.eamta.ar). The second main sub-project is to test different kinds of sensors in the skywater technology, such as radiation sensors for radiotherapy, photodetectors and others. Both sub-projects will be integrated in the same chip and are detailed next.

The Argentine School of Micro-Nanoelectronics, Technology and Applications, EAMTA, is a one-week school where undergraduate and graduate students attend intensive courses on topics related to the area of micro-nano electronics, with the aim of disseminating this area of knowledge, deepening the knowledge of professionals and academics, and promoting the development of related technology in the country and the region. The academic offer includes from basic courses, where students are introduced to the design of integrated circuits (IC), to advanced courses to improve analog and digital design techniques. All students, professors, graduates and professionals of Electronic Engineering and related careers, and the entire scientific community in general, are invited to participate.

The Basic VLSI Design course is EAMTA’s most traditional track, and is the initiation course for all students who pass through the School. It provides the student with the knowledge of the physical fundamentals of MOS device operation, as well as the fundamental principles of the CMOS microfabrication process. Also, provide the students the ability to design basic analog and digital circuits, as well as the use of CAD tools.

Each year, as the final project of the course, a moderated design problem, a 4-bit counter, is designed. The objective is that the student learns the physical fundamentals of the operation of MOS devices, the fundamental principles of CMOS integrated circuits fabrication, and acquire the ability to design basic analog and digital circuits, as well as the use of CAD tools. The student will have to verify the logic and electrical circuit that is presented, and once this stage is passed, proceed to design the physical design of the circuit. The proposal is a synchronous 4-bit binary counter with serial enable logic [Wakerly2018].  The schematic circuit is shown in Fig. 1. Each Flip-Flop in Fig. 1 is composed by a typical master-slave D-FF (Fig. 2) [Rabaey2003] with a controled bit-flip circuit at the input.

Fig.1: Synchronous 4-bit binary counter with serial enable logic [Wakerly2018].

Fig. 2: D-FF Schematic circuit [Rabaey2003].

After EAMTA, interested students will design and send for fabrication a more ambitious structure, an 8-bit current-steering DAC. Current steering DACs are based on current cells in which current is steered to the load depending on the input code. These current cells are organized in arrays with unary encoded or binary-weighted matched elements in a thermometric or in a binary architecture respectively (Fig. 3)[Razavi2018].

Fig. 3: a) Binary structure and b) Termometric structure [Razavi2018].

In this project, segmented architecture is assumed, where the disadvantages of each of the aforementioned architectures are counteracted and the advantages can be taken. In the case of the thermometric architecture, the monotonicity of the signal is achieved by switching one by one each of the exactly equal unity current cels. But this advantage is paid with higher complexity in the binary to thermometer decoder. In the other case, binary DACs are simpler but when the number of bits of resolution grows, the monotonicity can be seriously affected by huge glitches. In the segmented architecture, the least significant bits steer binary-weighted current sources, while the most significant bits are thermometer encoded and steer a unary current source array as seen in the Fig. 4 [VanDerPlas2000].

Fig. 4: Example of a segmented implementation [VanDerPlas2000].

Parallel to the student’s designs, EAMTA’s teacher staff would like to test the functionality of certain sensors.

Dosimeters for radiotherapy based on PIN photodiodes: The measurement of total ionizing dose in radiotherapy is of great importance as a part of Quality Assurance procedures in modern radiotherapy procedures. This sub project aims to develop a current integrator for a PIN photodiode using TID tolerance by layout techniques. Also, on-chip photodiode structures will be evaluated as potential detectors. Low noise integration circuits for low amplitude signals are required for this application. The response to X-ray photons from a radiotherapy LINAC will be evaluated studying the dark current, noise and total ionizing dose degradation. The proposed circuit is based on the circuit used in [Mateos2017] from Fig. 3, but fully integrated instead of using discrete components. The main requirements are a low leakage current in the Sw_Reset transistor, and tolerance to low levels of TID of the NMOS transistors using the enclosed layout technique to avoid overlapping of the gate over STI structures.

Fig. 5: Proposed dosimeter circuit for radiotherapy.

Single Photon Avalanche Diodes (SPAD): Since the fabrication process provides different implants, possible structures operating as SPADs will be designed and built in order to evaluate their performance. SPADs are special PN junctions operated above the avalanche voltage, which can multiplicate charge. Usually SPADs are built using a high doped PN junction enclosed by a guard ring created with lower doping levels to reduce the electric field in the periphery and thus avoiding high electric fields by corona effect, which would trigger the avalanche effect locally. Structures with different sizes and implants will be evaluated. Since the chips are encapsulated in a closed QFN package, the response of the junctures will be evaluated using a Fe-55 source or fluorescence X-ray photons which can penetrate the package, or use deliding techniques to open a window in the plastic package. 

Photodetector sensors: The proposed photodetector structure is an array of hexagonal interconnectable píxles, similar to those presented in [Calarco2019]. The aim of the circuit is to fully characterize the skywater process photodiodes photoresponse and test the inter-pixel connection functionality. Fig. 4a shows the proposed pixel structure. Each píxel has three connection MOS switches that allow it to connect with any of its neighbors. The state of connection of each switch is stored on its corresponding SRAM cell, also embedded on-píxel. Fig. 4b shows a 2x2 pixels array. In the figure can be seen the configuration lines of the SRAM cells. The pixel's connection information (Data) is shared for all the cells of all the pixels in a row, and the specific cell in which will be recorded this information is selected by means of the column control lines, just like the in the a standard memory array. The output current of each píxel (photodiode) has a forth MOS switch with its corresponding SRAM cell embedded, not shown in the figure. 

  Fig. 6: a) Pixel’s schematic illustration and b) Array of 2x2 pixels.

Control lines are managed by means of two shift registers. Dimension of the final array will depend on the available área.

Teachers Staff: 

Dr. Ing. Pedro Julián (UNS, CONICET), Dr. Ing. José Lipovetzky (Balseiro Institute, CONICET), Dr. Ing. Benjamín Reyes (UNC-CONICET), Dr. Ing. Nicolás Calarco (UNComa, CONICET),  Dr. Ing. Gabriel A. Sanca (UNSAM), Dr. Joel Gak (UCU, Uruguay), Dr. Matías Míguez (UCU, Uruguay), Dr. Alfredo Arnaud (UCU, Uruguay), Dr. Ing. Ariel Pola (CognitionBI-Fundación Fulgor), Eng. Federico G. Zacchigna (FIUBA).

REFERENCES

[Wakerly2018] John Wakerly, “Digital Design: Principles and Practices”, 5th. edition. Pearson Education Upper Saddle River, NJ, 2018.

[Rabaey2003] Jan M. Rabaey, Anantha P. Chandrakasan, and Borivoje Nikolic. “Digital integrated circuits: a design perspective”, volume 7. Pearson Education Upper Saddle River, NJ, 2003.

[Mateos2017] H. Mateos et al, "Characterization of sensors and design of an embedded photodetectors array for beam profile measurements in radiotherapy." 2017 Eight Argentine Symposium and Conference on Embedded Systems (CASE). IEEE, 2017.

[Calarco2019] Nicolás Calarco, Lucas Mombello, José Lipovetzky, Ariel Lutenberg, and Fernando Perez Quintián. Self-aligning cmos photodetector sensor for application on an ndb-based optical encoder. Appl. Opt. 58 (33) : 9172–9177, Nov 2019.

[Razavi2018] B. Razavi, "The Current-Steering DAC [A Circuit for All Seasons]," in IEEE Solid-State Circuits Magazine, vol. 10, no. 1, pp. 11-15, 2018.

[VanDerPlas2000] G. A. M. Van Der Plas, J. Vandenbussche, W. Sansen, M. S. J. Steyaert and G. G. E. Gielen, "A 14-bit intrinsic accuracy Q/sup 2/ random walk CMOS DAC," in IEEE Journal of Solid-State Circuits, vol. 34, no. 12, pp. 1708-1718, 1999.