Project Goal:

Design a Receiver Front-End of CMOS Cascode Common Source Stage with Inductive Degeneration Low Noise Amplifier.

General description:

Low noise amplifier (LNA) is generally the first stage of a receiver. Its performance appreciably affects the overall receiver performance. Its purpose is to amplify the weak received signal with minimal added noise by the LNA to maintain a low noise figure, in addition of having matching networks on the input (connected to the antenna of 50 Ω) and output to achieve maximum power transfer.

LNA performance metrics:

• Noise Figure [NF]: the noise figure determines the signal to noise ratio of the input compared to the signal to noise ratio of the output which determines the overall added noise by the circuit in this case the LNA, typically noise figure < 3dB (NF=SNR_in/SNR_out).

• Gain: The gain of the LNA must be large enough to minimize the noise contribution of subsequent stages, specifically, the downconversion mixer(s), the gain required usually in the range of gain > 20dB.

• Input Return Loss (input matching): for maximum power transfer between the antenna and the LNA matching networks must be added, the S-parameters are used to calculate the reflected and transmitted signals to the LNA at the operating frequency, S11 for example must be low at the operating frequency to achieve max power transfer.

• Stability: Unlike the other circuits in a receiver, the LNA must interface with the “outside world,” specifically, a poorly-controlled source impedance, for this reason, the LNA must remain stable for all source impedances at all frequencies. A parameter often used to characterize the stability of circuits is the “Stern stability factor,” defined as

          Where

• Linearity: Linearity of the LNA is distinct by its intercept points IIP3 and P1 dB points. The LNA topology does not limit the linearity of the receiver. Owing to the collective gain through the Receiver chain, the overall IIP3 and P1 dB points are automatically limited. Therefore, in LNA design, its linearity is of least concern.

Proposed Specifications:

                Note: These specs are subject to change if the circuit was integrated with a system that requires different specs.

Schematic:

• proposed schematics:

References:

[1] Mahesh Mudavath∗ and K. Hari Kishore Research Scholar, K L University, Guntur District,     Vaagdevi College of Engineering, Warangal 522502, India Department of Electronics and Communication Engineering, K L University, Vaddeshwaram, Guntur District 522502, Andhra Pradesh, India “Design and Analysis of Receiver Front-End of CMOS Cascode Common Source Stage with Inductive Degeneration Low Noise Amplifier on 65 nm Technology Process”.

[2] Jack Li and S. M. Rezaul Hasan, Senior Member, IEEE “Design and performance analysis of a 866-MHz low-power optimized CMOS LNA for UHF RFID”

[3] RF Microelectronics, 2nd Edition, Behzad Razavi. Pearson Education, Inc., 2012.