Efabless Logo
UCSC OpenRAM Test Chip
public project
MPW-2   
Repository

This project contains a test chip for several OpenRAM memory configurations. The configurations have varying levels of verification. In particular, it has these sizes:

  • sky130_sram_1kbyte_1rw1r_8x1024_8
  • sky130_sram_1kbyte_1rw1r_32x256_8
  • sky130_sram_2kbyte_1rw1r_32x512_8
  • sky130_sram_4kbyte_1rw1r_32x1024_8
  • sky130_sram_8kbyte_1rw1r_32x2048_8
  • sky130_sram_1kbyte_1rw_32x256_8
  • sky130_sram_2kbyte_1rw_32x512_8
  • sky130_sram_4kbyte_1rw_32x1024_8
  • sky130_sram_4kbyte_1rw_64x512_8
  • sky130_sram_8kbyte_1rw_64x1024_8
project layout image
project layout image
Layout Image
Owner
Matthew Guthaus
Organization URL

https://vlsida.soe.ucsc.edu

Description

Test chip for single and dual port memories created by OpenRAM.

Git URL

https://github.com/VLSIDA/openram_testchip.git

Category

sram

Process

sky130A