1  Introduction

In this project, we plan to design and build an audio-band analog-to-digital converter (ADC) based on the tri-level continuous-time delta-sigma modulator (CTDSM) using negative-R assisted integrator proposed by Jang, Lee and Chae [1].

2  Block Diagram

Figure 1  Block Diagram of the audio-band ADC [2]

Figure 2  Block Diagram of the CTDSM [1]

3  Schematics

Figure 3  Architecture of tri-level CTDSM using negative-R assisted integrator [1]

Figure 4  Schematic of the first operational amplifier [1]

Figure 5  Schematic of tri-level resistive DAC and its operation [1]

Figure 6  Schematic of the first integrator with negative-R implemented in

cross-coupled inverter [1]

4  Target Performance

*FOM_DR = DR + 10log₁₀(BW/Power)

**FOM_SNDR = SNDR + 10log₁₀(BW/Power)

Table 1  Target Performance of the Tri-level CTDSM [1]

5  Description

The proposed audio-band ADC includes a CTDSM, a digital filter and a decimator to convert the analog signal to digital signal as shown in Figure 1. The CTDSM has negative-R assisted integrators and tri-level feedback digital-to-analog converters (DAC), corresponding to the block diagram in Figure 2 [1]. Because of the finite response of the operational amplifier A(s) (opamp), the virtual ground of the opamp is non-ideal and a current loss is generated, resulting in the loss of magnitude and bandwidth. With a negative-R applied at the virtual ground, the loss current is canceled out by the compensation current and the virtual ground becomes ideal. Therefore, the finite gain and bandwidth of the opamp are compensated. Additionally, the negative-R assisted integrator mitigates requirements of noise and linearity, and reduces power dissipation of the CTDSM [1].

Figure 3 shows the architecture of the tri-level CTDSM [1]. This CTDSM has a third-order chain of integrators with weighted feed-forward summation (CIFF) structure and a tri-level resistive non-return-to-zero (NRZ) DAC. Figure 4 shows the schematic of two-stage opamp in the first integrator [1]. The short-channel input transistors M₁ and M₁’ can be used since the noise is mitigated. The second stage of the opamp applies class-AB fashion so that static current is minimized. Figure 5 shows the schematic of the tri-level resistive DAC [1]. Figure 6 shows the schematic of the first integrator and a negative-R assistant implemented in a cross-coupled G_m [1]. The negative-R assistant is implemented with the inverter topology, which performs better in terms of opamp noise attenuation and third harmonic distortion.

6  Design Goals

In this project, our goal is to design the ADC with good performance to convert the audio-band analog signal to digital signal. The CTDSM in the ADC is expected to reach low power consumption, high energy efficiency, high SNR, SNDR, SFDR and large dynamic range. The harmonic distortions and the mismatch effect should be suppressed so that the linearity performance of the CTDSM can be improved. The detailed target performances are shown in Table 1.

7  References

[1] M. Jang, C. Lee and Y. Chae, "Analysis and Design of Low-Power Continuous-Time Delta-Sigma Modulator Using Negative-R Assisted Integrator," in IEEE Journal of Solid-State Circuits, vol. 54, no. 1, pp. 277-287, Jan. 2019. [Online]. Available: https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8486729

[2] S. Shahramian, "Tutorial on the Theory, Design and Characterization of Delta-Sigma Analog to Digital Converters," in The Signal Path, Aug. 2018. [Online]. Available: https://thesignalpath.com/blogs/2014/08/04/tutorial-on-the-theory-design-and-characterization-of-delta-sigma-analog-to-digital-converters/

8  Team Members

Runkun Li — undergraduate student in Department of Electronic Engineering, The Chinese University of Hong Kong. Email: 1155124587@link.cuhk.edu.hk

Piao Deng — undergraduate student in Department of Electronic Engineering, The Chinese University of Hong Kong. Email: 1155141397@link.cuhk.edu.hk