Efabless Logo
Customized SERDES
public project

Miniaturization of electronics products require the circuit board’s size to be reduced. Besides components, the number of interconnects is the key factor effecting the size of a circuit. For the same reason, in circuits where large chunks of data is to be transferred designers prefer to use serial protocols. Several applications require interfacing of processor with multiple components that may include other processors, memories, ADCs, DACs, sensors, actuators, etc. Most of the processor today either have limited number or no serial lines at all. And employing software for the same (i.e. bit-banging) utilizes more hardware resources and thus is less idea of a solution in terms of power consumption. To cope with this issue we propose a solution where a processor’s GPIO can be interfaced in parallel with an IC that will serialize the parallel output of the processor and deserialize the serial input to the processor.

Description

Customized SERDES with selectable Serial protocol

Version

1.0

Category

spi