Many types of hardware accelerators for machine learning have been proposed, such as those based on standard-cell design (starting with transaction-level models in SystemC or behavioral models), IP block -based models using a behavioral HDL (in Verilog, VHDL, or SystemVerilog) or other high-level HDL, such as Chisel HDL, PyMTL, PyRTL, or Clash, Coarse-Grained Reconfigurable Architecture (CGRA), FPGA implementations, or in-memory computing. We implement a series of in-memory computing designs for machine learning, using SRAMs (based on my open-source Modica-SRAM project), DRAM, and non-volatile memories subsystems (NVRAM) that use memristors, FinFETs, and antiferromagnetic magnetic devices. We are planning to tape-out either the NVRAM design or the design based on antiferromagnetic magnetic devices, depending on the trade-offs in their metric scores based on simulation results. We will tapeout the design with a better trade-off of optimization metrics. Future work involves implementing other non-von Neumann computing paradigms, such as hyperdimensional computing. References: @phdthesis{Imani2020, Address = {La Jolla, {CA}}, Author = {Mohsen Imani}, Howpublished = {Available online from {\it University of California: California Digital Library: {eScholarship} Publishing: {UC} San Diego: {UC} San Diego Electronic Theses and Dissertations} at: \url{https://escholarship.org/uc/item/9mm4b9f0}; September 3, 2020 was the last accessed date}, School = {{University of California, San Diego}}, Title = {Machine Learning in IoT Systems: From Deep Learning to Hyperdimensional Computing}, Url = {https://escholarship.org/uc/item/9mm4b9f0}, Year = {2020}} https://www.mccormick.northwestern.edu/news/articles/2021/06/a-more-robust-memory-device-for-ai-systems/ https://www.mram-info.com/researchers-developed-promising-antiferromagnetic-mram-device-structure
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