https://vlsisystemdesign.com/
Aims at design of a SRAM cell array with a configuration of 1.8 V operating voltage and access time less than 2.5ns using Google SkyWater SKY130 PDKs and OpenRAM memory complier.
https://github.com/ShonTaware/vsdsram_caravel.git
sram
sky130A
MPW-3
OpenRAM
SKY130
VSD
VSDSRAM
