This is a cryptography accelerator ASIC designed using the SKY130 process node. It includes key-limited hardware implementations of cores for AES128/AES256 and SHA256, as well as an experimental VGA-based game demo. The eventual goal of this project is to use it for embedded/IoT security applications.
This chip contains 4 major components:
VGA Game Demo (experimental)
If you are collaborating on this project, please click here to access your collaboration files, and click "Accept Share" in the actions column if you haven't done so already.
SHA/AES accelerator and VGA graphics demo