- CAN bus controller for autonomous vehicles, connected to caravel and with it's I/O and debug interfaces exposed on I/O pins (developed by Natalia Machado)
- picoRF0 - a multicycle CPU core running a simplified RISC ISA (used for teaching, normally on FPGAs). Connected to caravel for memory interfacing and I/O usage
- can be tied to the CAN bus controller through caravel
- Tiny VGA pong game controller to test I/O interface speed
CAN bus controller and teaching-oriented CPU core
1.0
processor
sky130A