- CAN bus controller for autonomous vehicles, connected to caravel and with it's I/O and debug interfaces exposed on I/O pins (developed by Natalia Machado)
- picoRF0 - a multicycle CPU core running a simplified RISC ISA (used for teaching, normally on FPGAs). Connected to caravel for memory interfacing and I/O usage
- can be tied to the CAN bus controller through caravel
- Tiny VGA pong game controller to test I/O interface speed
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CAN bus controller and teaching-oriented CPU core
11/14/21 22:13:49 PST
12/28/21 07:39:50 PST