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fuserisc2
public project
MPW-3   

Fuserisc2 is a Heterogeneous Multicore SoC, integrating a customised embedded FPGA fabric and two RISC-V cores (modified IBEX cores from LowRISC). 

 

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Description

Demonstration of the Fabulous FPGA design flow using the Skywater 130 process. This project demonstrate Fuserisc2 - a Heterogeneous Multicore SoC, integrating a customised embedded FPGA fabric and two RISC-V cores (modified IBEX cores from LowRISC).

Version

v3

Process

sky130A