This design implements a stereo delta-sigma audio DAC with 16b and a sample rate up to 48KHz. The digital ds-modulator features a single-bit output, and thus two digital GPIO (per channel) are used as differential output drivers (later a dedicated H-bridge driver implemented full-custom can be added to the design so that headphones down to 16Ohm load can be driven directly).
The digital delta-sigma core is coupled to the Wishbone SoC bus through a FIFO (size TBD). A simple 4b volume control with mute (resulting in 6dB steps) is implemented, and the delta-sigma modulator can be programmed to 1st and 2nd order. The oversampling ratio is selectable as well, and supports OSR=32/64/128/256.
As a classroom project at Johannes Kepler University, we are designing a delta-sigma audio DAC, with a maximized digital and minimized analog content. The specifications are 16b, 48kHz sample rate with direct drive of line-out or headphones (load impedance 16 to 600Ohm). The design supports 1st or 2nd-order delta-sigma, volume control, and a FIFO asynchronous interface to a host system.
main
dac
sky130A