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Libre-SOC Crypto-Router
public project
MPW-2   

Libre-SOC exists because, frankly, the incumbent industries cannot be trusted.  Intel "Management" Engine, Qualcomm, Apple zero-day WIFI exploits, the works.

https://www.zdnet.com/article/qualcomm-chip-vulnerability-found-in-millions-of-google-samsung-and-lg-phones/

https://libreboot.org/faq.html#intelme

https://it.slashdot.org/story/19/03/05/1524251/all-intel-chips-open-to-new-spoiler-non-spectre-attack

This therefore defines our business model: to be entirely transparent right down to the GDS-II files, providing not only benefits to education and academic institutes, but to businesses for whom transparency and security is paramount.

ASICs that are not transparent can be hacked and are being hacked, plain and simple.

https://www.theguardian.com/media/2020/dec/20/citizen-lab-nso-dozens-of-aljazeera-journalists-allegedly-hacked-using-israeli-firm-spyware

We therefore choose to start small and work our way up, learning as we go, with the ultimate goal being to provide end-users with mass-volume products that they can trust.

Our first main product is a 300mhz 5-port Gigabit Router ASIC capable of running OpenWRT.  We will be extending the OpenPOWER v3.0 ISA with cryptographic and bitmanipulation primitives suitable for speeding up SSL/TLS, Diffie-Helmann etc.

https://libre-soc.org/crypto_router_asic/

 

project layout image
project layout image
Layout Image
Owner
lkcl
Organization URL

http://libre-soc.org

Description

Libre-SOC is an entirely Libre-licensed SoC based on the OpenPOWER v3.0 ISA. Layout is in conjunction with Sorbonne University (coriolis2) and the Cell Library with Chips4Makers (FlexLib). We aim to develop an entirely Libre-Licensed cryptographic-capable 5-port GbE router ASIC capable of running OpenWRT. https://libre-soc.org/crypto_router_asic/

Category

processor

Process

sky130A