Efabless Logo
CMOS High Speed...
public project
MPW-6   

This is a novel dynamic comparator design that improves the common mode performance. Its high-speed capabilities at lower input voltage and lower common-mode voltage are verified in simulations. Various parameters like noise, offset, kickback, power consumption are evaluated. To further support our arguments, on-chip validation is essential.

Description

This is a novel dynamic comparator design that improves the common mode performance. Its high-speed capabilities at lower input voltage and lower common-mode voltage are verified in simulations. Various parameters like noise, offset, kickback, power consumption are evaluated. To further support our arguments, on-chip validation is essential.

Category

comp

Process

sky130A

Labels

ADC