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Caravel_RISCV_OSU
public project
MPW-1   
Repository

OSU RISC-V Caravel

This is an implementation of a single-cycle RISC-V processor inside of the Caravel test system for use in the SkyWater 130nm PDK.

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Owner
James Stine
Organization URL

https://vlsiarch.ecen.okstate.edu/

Description

Caravel_RISCV_OSU is an implementation of a single-cycle RISC-V processor inside of the Caravel test harness intended for use with the SkyWater 130nm PDK.

Git URL

https://github.com/AlexSUnderwood/caravel_riscv_osu.git

Version

0.1

Category

Test Harness

Process

sky130A

Labels

Open MPW

Test Harness

RISC-V

MPW-ONE