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Anshul Verma

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I am a research scholar in the Electronics & Communication Engineering department at the Indian Institute of Technology (IIT) Roorkee, Roorkee, India. My research area includes Analog/RF and Mixed signal circuit design, mainly focused on Phase Locked Loops (PLL).

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Skills

Cadence Virtuoso Calibre Python Spectre Verilog

Area of Expertise

Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification

Interests

Analog Circuit Design RF Circuit Design Mixed Signal Circuit Design PLL VCO Frequency Sythesizers

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