My area of interest is Analog and Mixed signal circuit design. I teach Electronic Circuit, VLSI design and Signals & Systems for under graduate students and Analog Integrated Circuit Design, Data Converters and Clock & power management circuit courses for Masters students. I also teach VLSI lab courses for both both undergraduate and masters students. Every year I supervise both undergraduate and masters students in analog circuit design projects. Presently I am involved in SRC project as Co-task leader in Analog and Mixed Signal circuit verification project using Machine learning techniques.
I am a research scholar in the Electronics & Communication Engineering department at the Indian Institute of Technology (IIT) Roorkee, Roorkee, India. My research area includes Analog/RF and Mixed signal circuit design, mainly focused on Phase Locked Loops (PLL).