Senior Vice president at Signoff Semi
im a student who want learn design VHDL
I m the Account manager, at Adroitec Systems Pvt Ltd, we are providing physical design services
CEO of PineS Corp., Established in 1999, ASIC Design Service & Full Custom Layout Service.
20+ Years of Experience in Chip Design
i am working as physical design engineer
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
Electrical engineer with over 7 years of experience in the semiconductor industry. Working experience in Analog IC Design, Silicon/FPGA Lab bring-up and testing, FPGA Prototyping/Emulation & ASIC/SoC Design,
Master's student at UFCG. Work with Cadence tools. I work with AMS and digital circuits (using Verilog language) and analog layout as well.
Graduate student of ECE department Ain Shams University, and Currently Master Student of ECE department Cairo University with major of Electronics design.
I am a senior researcher in INESC-ID, Lisbon.
Digital designer experienced in high-speed ASICs for optical/copper transceivers, including DSPs, error correction and SoC support.
VLSI design project manager
Paulo Roberto B. de Carvalho is a Hardware and Digital IC Design Engineer with 6-years experience in microelectronic area in Digital IC Design, with specialization in RTL design optimization for area and power reduction, Verification and Physical Implementation flow. He has 10-years experience in Application Engineering, technical consultant and semiconductors manufacture processes. He received his bachelor degree in materials, processes and electronic components technology at Faculdade de Tecnologia de Sao Paulo (FATEC-SP) in 2006. In 2011, he joined the Brazillian Federal Government IC Brazil Program of the Ministry of Science, Technology and Innovation (MCTI), trained in Digital Systems Design area. He received his Master of Science degree in Electric Engineering with specialization in Microelectronic area on Integrated Systems Laboratory at Electrical Engineering Department of Polytechnic School of University of Sao Paulo in 2016.
Hardware design engineer
José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.
Graduated with a Micro-electronics Master from Bordeaux university, France, I have now 18 years of experience. Worked in France, England, Belgium and Brazil, within 5 companies. Implemented physical design flows, recruited, trained and supervised trainees to experienced engineers, I have a vast experience in setting up complete flow (2 companies were startups), as well as signing off important design within NXP and CSR, all to successful first time right silicons. Able to work in total independence as well as within a team, I consider myself as optimist, result focused, with attention to detail while keeping a good trade between time to market and risk taking.
Associate Professor (Electrical and Electronic Engineering) Implantable chip design Low power sensors
Physical Design Engineer
Physical design engineer
An experimental physicist through sensor and instrumentation development.
I am Assistant Professor in Bio-Electronics. My research interests include analog mixed-signal ICs for medical applications, RFIC, and ultra-low power circuits.
Physical Design Engineer
Eduardo is an Electrical Engineer engaged in hardware development with a true passion for developing and enhancing applications. While at university, he worked in a variety of projects, from VHDL in a SOC project, to a PCB for a power circuit, and even web interfaces for electronic devices network connected. He allies his technical background with great communication skills. He is used to and is passionate about working in diverse cultural environment as was his period as an international student in Japan. He also got a certification in in Digital Integrated Circuit Design and Project Flow with Cadence tools (IC Brazil Program). Currently he works at HT Micron, and is interested in positions related to chip design, hardware design, embedded software development and similar areas.
A recent graduate student from Syracuse University major in Electrical Engineering with focus in VLSI Designs
Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.
I am currently an Associate Professor in the Electrical and Computer Engineering Department at North Carolina Agricultural and Technical State University (NC A&T). As director of the Automated Design for Emerging Process Technologies (ADEPT) laboratory at NC A&T, I research the following questions: (1) how can we make computers more reliable in harsh environments (i.e., ionizing particles, malicious fault injection) and (2) how can we extend Moore’s law (e.g., 3D IC)? To answer these questions, he interrogates the traditional abstraction layers of integrated circuit design (i.e., functional description, circuit design, physical design) to discover design methodologies that are more relevant to these goals.
Virginia Microelectronics Consortium (VMEC) Professor in the ECE Department at the University of Virginia
I work as an Assistant Professor (Grade I) in the department of ECE in IIITDM Kurnool, India. My research work includes VLSI for Signal Processing and Information Security.
Research Scholar | Analog Circuits | EMI Immune Amplifiers | Neuromorphic Circuits
Edward Joullian Endowed Chair in Engineering Oklahoma State University Department of Electrical and Computer Engineering VLSI Computer Architecture Research Group
Assistant Professor (IISc) | Ph.D. & S.M. (MIT) | B.Tech. (IIT-KGP)
I am working as Co-founder & CTO of Upplysning Robotics, which is focused on the development of biomedical devices like digital stethoscopes with built-in ECG and PCG, auto-detect heart irregular arrhythmias, and its flagship project is the design of artificial hearts and implants inside the human body and also Cardiac Robotics medicals devices
Professor of CSE at UC Santa Cruz
Analog/Mixed signal designer.
BS EE from Stanford University and Digital Designer. Areas of focus are computer architecture, VLSI, and Analog IC. I am interested in making chips to test myself.
Student of the Russian Technological University, Moscow.
I am an Associate Professor teaching VLSI design, hardware security, and digital circuit design at Drexel University. My research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation and Trojan detection, and electric and thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.
A researcher and VLSI guy
I am VLSI Trainee wanted to design chips
Digital design engineer Msc Student at cairo university Faculty of Engineering
A hard working IC Design master student aiming excellency and professional experience in the field of Integrated Circuit Design specially analog and mixed signal design like Data converters, LDO, Opamp and Bandgap reference.
I'm a third-year student at Bits-Pilani (ECE). I am greatly interested and highly motivated towards pursuing a career in digital and analog circuits.
I am an Electrical Engineering working VLSI design farm with 7 tape-out experiences.
Broad background in ASIC's with expertise spanning networking, high speed compute and digital signal processing. Expertise across all areas of development from verification to tape-out.
SoC Architect.Technologist. Hands-on experience in complex low power SoC designs, from concept to production. Excellent track record in successful development and production of ASICs, Technologies: Bluetooth, WLAN, IoT, Gigabit Ethernet, EPON networks, Interface ICs, Broadcast TV and Communication controllers. Demonstrated consistent track record of first-pass silicon success. PhD in Low power VLSI. Recipient of US and Indian patents. Core Competency: Chip Architecture, Micro Architecture, logic design, RTL Verilog coding, Chip level verification, Static Timing analysis, Formal Verification, design rule checking, AXI, AHB and APB bus protocols, Digital ASIC methodology, DFT methodology, Low Power ASIC design, Interfacing with backend teams, Timing closure, Post silicon bring up and validation, Project Planning, Scheduling and Management, FPGA Prototyping. Author of Book "A Practical Approach to VLSI System on Chip (SoC) Design" published by Springer Nature. Domain experience: Communications, EPON, WLAN, Bluetooth, IoT, Healthcare, Nextgen TV, Automotive. Managed dynamic, cross cultural teams of size 40 to 100. Standards worked on IEEE802.3, IEEE802.11b, ac, ad. ATSE 3.0, Automotive ethernet, Bluetooth Quality standards: ISO 9002, ISO 13485, IEC 60601-2 Funded Research: Derivative Low power standard cell library development PhD Guidance: 2 one in Asynchronous VLSI design methodology and second in Sub 1V power supply for complex SoCs. Co-founded healthcare company:Sensesemi Technologies Pvt. Ltd. Academic research head and taught engineering students for their undergrad, Post grad and PhD courses Chair, IEEE NanoTechnology Council, Bangalore Section as a founder Chairperson, Current Senior IEEE member.
I am a PhD student at National University of Sciences and Technology, Islamabad
I am professor at Dept of EEE, BUET, Passionate to teach students IC Design and Fabrication Skill.
My area of interest is Analog and Mixed signal circuit design. I teach Electronic Circuit, VLSI design and Signals & Systems for under graduate students and Analog Integrated Circuit Design, Data Converters and Clock & power management circuit courses for Masters students. I also teach VLSI lab courses for both both undergraduate and masters students. Every year I supervise both undergraduate and masters students in analog circuit design projects. Presently I am involved in SRC project as Co-task leader in Analog and Mixed Signal circuit verification project using Machine learning techniques.
Master's research student in IC design has hands-on experience on Cadence tools like Virtuoso, Genus, Innovus, Calibre. Motivated to learn more in the field of IC design
Cryptography and security researcher at Seagate Technology
I am extremely dedicated individual looking for an opportunity to learn and explore new ways to implement the latest technology. My dream is to join a core company and work on on-site projects. I believe my skills and hunger to learn will turn me into an important asset to the company. Thank you
Just another big dreaming engineer with a desire to learn silicon microfab
13+yr ASIC Digital Designer. Master degree on Microeletronic Sensors. Worked on NXP through different projects on automotive and consumer/general market MCUs on areas from SoC Integration to Timing Sign-Off
Digital System Designer.
Physical Design over 10 years, Front-End Design over 4 years, have knowledge on DFT, STA, ...
I am hager mohamad diff allh, from faculty of engineering-MINIA university (Electrical engineering department).
I am an Assistant Professor in the VLSI vertical of Department of ECE at RV College of Engineering, Bengaluru, Karnataka. I am a passionate teacher who teaches various courses in VLSI domain. My research interests are in the areas of Analog and RFIC Design. I got several opportunities at RVCE to implement various personalized teaching methods for the students, facilitated experiential learning, adapted innovative techniques in teaching and learning through flipped classroom and blended learning approaches. I am currently responsible for the curriculum design and development for courses in VLSI domain. I am also responsible for introducing new electives in specific areas. I have a YouTube channel with 300 + videos on the courses taught so far for the benefit of a wider student community.
Sr VP RnD , VLSI engineering
Hon-Piu Lam, is a Ph.D. candidate in the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). He was an analog IC designer engineer in Valence Semiconductor from 2004 to 2007. From 2007 to 2015, he joined Fujitsu Semiconductor focusing on the embedded NOR flash design. He has been a researcher in HKUST focusing on the integrated power electronic and data converter. His research interests include readout electronics, integrated power electronics and radiation hardened electronics for experimental physics.
IC Designer
D Gracia Nirmala Rani received the B.E. degree in Electronics and Communication Engineering from Syed Ammal Engg College, Madurai, India, in 2004, and M.E. degree in VLSI Design from Karunya University, Coimbatore, India in 2007. She has awarded Ph.D. degree in VLSI Design from Anna University, Chennai India in 2014. She is working as an Associate Professor in Thiagarajar College of Engineering, Madurai since 2007. She teaches courses on system/digital and analog electronic design and VLSI processor architectures. Currently, five research scholars are doing their research under her guidance. She has authored or co-authored 42 international journal and conference papers like IET Circuits, Systems and Devices, Spinger, Wiley and Elsevier Publications. Also she has published 3 Books/Book Chapter in Springer LNCS and CCIS Publications. She has filed 2 Patent in BioMedical Engineering Field. She has guided the B.E students’ project which won the India Cadence Design Contest Award 2017 and 2018 instituted by Cadence Design System Pvt Ltd, Bangalore. In 2018, she was the technical program chair of the 22nd International Symposium on VLSI Design and Test. She is serving as a reviewer in IEEE Transaction on Nanotechnology, Elsevier and Inderscience Journals, respectively. Her research interests include RFIC Design, Physical Design Automation, Optimization Algorithms using Machine learning for IC and mixed signal circuits and systems for Bio-medical Devices.
Love for ELectronics Chips Designing, Eager for knowledge. Close to Nature and meet me on the success road.
Ajith Ravindran (Senior Member, IEEE) received the B.Tech. degree in electronics and communication engineering and the M.Tech. degree in VLSI and embedded system from the Saintgits College of Engineering, Kottayam, India, in 2010 and 2013, respectively. I have been working as an Assistant Professor with the Electronics and Communication Engineering Department, Saintgits College of Engineering, since 2013. Authored many refereed international journals and conference publications. My research interests include digital IC design, microelectronics, and optical MEMS.
Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.
Hi, I'm a student at UACJ and I like integrated circuit designs.
Silicon Entrepreneur with extensive experience in Digital Physical Design, EDA and HPC Infrastructures for Electronic Design.
A digital design engineer, interested in memory hierarchies and high speed interfaces.
Hello I'm sultan, and I'm from KLE technological University hubli and I'm very exited to do this course on picorisc.
President and CEO
R&D Engineer
An analog mixed-signal circuit designer for low-power precision sensor interfaces. See https://staff.aist.go.jp/ippei.akita/
i am engineering final year student and i am doing VLSI project
Mixed-Signal Integrated Circuits instructor and researcher.
Graduate Teaching Assisstant at Purdue SoCET Team
Adroitec Systems is design Services Company for the VLSI and Embedded Software. Founded in 2017, Adroitec Systems is having Register Office at Visakhapatnam with branch offices in Bangalore. Adroitec Systems delivers cutting edge solutions across a diverse portfolio of services including Physical Design, Physical Verification, and Design Verification. With about 50 highly qualified employees.
working as a assistant professor in the department of ECE ICFAITECH
I'm the CEO of a fabless semiconductor start-up company and have more than 15 years experience in designing mixed-signal ASICs on various foundry processes.
Hi I'm a MASc Student at University of Toronto. My research focuses are FPGA architecture, DL Acceleration, Heterogenous devices and CAD tools.
I am Dr. Chandra Sekhar Dash, Currently serving as Associate Professor, In Centurion University of Technology and Management, Odisha.
i am a vlsi enthusiast
Associate professor of Microelectronics at University of Cagliari, Italy
IC design engineer at Renesas Electronics. Have background in analog design, layout; hands-on knowledge of digital design, synthesis, P&R.
Analog and Mixed signal IC designer
i am very interested to learn about the Digital logic and its simulation
A designer, a PhD, Who simply love Circuit design
I am ASIC digital designer engineer, always keen to explore new alternatives, methodologies, designs. I like challenges and always proactive to help.
Hugo Hernández received his B.S. degree in Electronic Engineering from The Industrial University of Santander, Colombia in 2005 and M.S. degree in Electrical Engineering from Polytechnic School of the University of São Paulo (EPUSP), Brazil in 2008. Hugo obtained his Ph.D degree in Electrical Engineering from University of São Paulo in 2015. Hugo is an Analog/Mixed‐signal design engineer with strong background in IC design techniques, industry experience on ASICs for sensoring applications and hands on experience in 28nm, 55nm, 65nm, 130nm, 180nm and 0.35um CMOS process nodes. Research interests include Low power Data Converters, SAR ADCs, DACs, PLLs and Low power analog design.
sencillez y humildad
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From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...
I am a faculty from an eminent engineering college in Bangalore
