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"profiles" search for "skills": Xilinx ISE
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Number of Results: 5

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Andre5

I am Electronic Engineer from Chile, I like DSP and radioastronomy applications an ordinary guy

Skills

C/C++ System Verilog Verilog Design Compiler Descartes Formality ICC ICC2 DFT Xilinx ISE design suite FPGA full flow programming

Area of Expertise

Circuits: Filters Circuits: Signal Processing Digital: Placement and Routing System: FPGA Programming System: Quality Assurance System: Test Programming
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Ankit Agrawal

I am VLSI Design & Verification Engineer.

Skills

Aldec RivieraPro C/C++ Digital Electronics System Verilog UVM Verilog Xilinx ISE

Area of Expertise

Digital: RTL Digital: Verification SoC: Verification
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A Devipriya

Skills

Python System Verilog C programming Xilinx ISE Design Suite eSim EDA Tool Skywater 130nm

Area of Expertise

Digital Design Verilog coding
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Zhiyang Ong

Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.

Skills

C/C++ Cadence Encounter Cadence NC-Verilog Cadence Virtuoso Electric CAD Electric VLSI Design System Matlab Mentor/Siemens EDA ModelSim ngspice Octave Perl Python Software Developer Synopsys Avanwaves Synopsys Cosmos Synopsys Design Compiler Synopsys HSPICE Synopsys NanoSim Synopsys PrimeTime System Verilog System-C Tcl/Tk Verilog VHDL Xilinx ISE

Area of Expertise

Academic: Research Academic: Student Analog: Design Analog: Modeling Analog: Simulation Analog: Verification CAD: Scripting CAD: Tool Development Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Signal Processing design space exploration of VLSI system designs Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks RTL code generation SoC: Floorplanning SoC: Verification System: Chip Editing System: FPGA Programming System: Test Programming VLSI layout design
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Burhan Showkat

Skills

ADS C EDA Multisim Solidworks XILINX ISE Xilinx Vivado

Area of Expertise

Academic: Student