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"profiles" search for "area_of_expertise": CAD: Tool Development

Number of Results: 129

Myrtle Shah

open source EDA tooling dev; currently at ChipFlow and YosysHQ

Skills

C/C++

Area of Expertise

CAD: Tool Development

Onur Ates

Tapeout Engineer and Electronic Lover.

Matthias

Skills

C/C++

Area of Expertise

CAD: Tool Development

Pushkaraksha K M

Physical design engineer with strong expertise in CAD and low power methodologies

Bob Ledzius

35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.

Alexey Shabalovskiy

Expert in embedded and mobile applications since 2003. Has many years of experience in software and hardware development, effective team management. Excellent in the research and development, technology findings and implementations.

Rod

I'm an engineer with experience in analog IC design both in private companies as well as academia. Experienced in design of delay locked loop(DLL), clock recovery, field detectors, voltage limiters, operational amplifiers, current mirrors, bandgap reference and so on.

Mishel Paul

Skills

Python

Area of Expertise

CAD: Tool Development

Nathan McCorkle

EDA software engineer working on silicon CAD for Intel during the day. I've got DNA synthesis on the brain, and have been learning how to integrate micro/nano fluidics with active electronics to achieve a wholly automated "genetic compiler". Building a nano fab in my home workshop.

Amro Tork

More than 14 years of experience in Electronic Design Automation roles with leading industry companies like Intel, Samsung and others. Have a strong background in EDA best practices and technologies like DRC, LVS, XRC, PERC and others. Have a mixed background in circuit. design, data science and programming with emphasis on data analysis for microchip design. Have strong background leading project deliveries to fortune 100 companies in the world. B.Sc. in Electrical Engineering from faculty of Engineering, Ain Shams University, Cairo, Egypt.

Ioannis Savidis

I am an Associate Professor teaching VLSI design, hardware security, and digital circuit design at Drexel University. My research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation and Trojan detection, and electric and thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.

Mitch Bailey

Developer of open source reliability verification system CVC(RV). https://github.com/d-m-bailey/cvc

Renaud GILLON

Program manager with more than 25 years experience in the semiconductor industry. Expertise in EDA tools, analogue, RF and high-voltage PDK development, sensor design, design support for electro-magnetic compatibility, ESD and functional safety.

Aki Van Ness

abyssal witch | deranged catgirl hardware/software engineer + vtuber | that crazy SCSI girl | she/her

David Mitchell Bailey

Open-source software developer with 30 years experience in back-end verification.

Art Scott

Founder and CEO of Earth ICT, SPC NAICS 334413; Semiconductor and Related Device Manufacturing Incorporation Date: 08/03/2021 Corporation ID: C4773876 1-650-996-7232 art@earthictspc.com Biography: Dauntless Entrepreneurial Risk-taker; Invited expert, ITU-T ICT Sector L.TIME (The IC Metric for Energy-efficiency, Quality-Factor) Recommendation. “Art is many faceted; he creates outside the box; he is a serial entrepreneur-intrapreneur and change agent, and is flexible-adaptable-situational. He has worked for Silicon Valley icons such as SRI, Applicon, Computer Sciences Corporation, Informatics, Atari R&D, Interactive Research Corp., Samsung Information Systems America. And he has participated in several startups: Digital Video Inc. (1985–2001), Ravisent Technologies (1998–1999)” [source: ”Sustainable computing - ACM ]

Steve Goldsmith

I am the founder of Aurifex Labs LLC. I have a BSEE from Wilkes University. I've spent most of my time in software, education, and entrepreneurship, but have spent the past year learning VLSI and am excited for this new era of open source hardware/tools.

Amit Varde

Experienced Senior Technology Manager with a demonstrated history of working in the semiconductor and Hi-Tech industry, High-Performance Computing (HPC) information technology, and services industry. Skilled in IT Infrastructure Management, sales enablement, semiconductor design development, and Electronic Design Automation software development. Strong business development professional from Harvard Business Analytics Program.

Mizuki Mori

A student of Keio Univ in Japan, interested in analog circuits rather than digital ones.

Dr D Gracia Nirmala Rani , Associate Professor, Thiagarajar College of Engineering

D Gracia Nirmala Rani received the B.E. degree in Electronics and Communication Engineering from Syed Ammal Engg College, Madurai, India, in 2004, and M.E. degree in VLSI Design from Karunya University, Coimbatore, India in 2007. She has awarded Ph.D. degree in VLSI Design from Anna University, Chennai India in 2014. She is working as an Associate Professor in Thiagarajar College of Engineering, Madurai since 2007. She teaches courses on system/digital and analog electronic design and VLSI processor architectures. Currently, five research scholars are doing their research under her guidance. She has authored or co-authored 42 international journal and conference papers like IET Circuits, Systems and Devices, Spinger, Wiley and Elsevier Publications. Also she has published 3 Books/Book Chapter in Springer LNCS and CCIS Publications. She has filed 2 Patent in BioMedical Engineering Field. She has guided the B.E students’ project which won the India Cadence Design Contest Award 2017 and 2018 instituted by Cadence Design System Pvt Ltd, Bangalore. In 2018, she was the technical program chair of the 22nd International Symposium on VLSI Design and Test. She is serving as a reviewer in IEEE Transaction on Nanotechnology, Elsevier and Inderscience Journals, respectively. Her research interests include RFIC Design, Physical Design Automation, Optimization Algorithms using Machine learning for IC and mixed signal circuits and systems for Bio-medical Devices.

Rashmi Jha

I am a professor in the department of electrical and computer engineering at University of Cincinnati. My areas of expertise are: CMOS, Beyond-CMOS devices such as RRAM, FeFETs, gated-RRAM, TFTs, novel device design, fabrication, and testing, neuromorphic computing, and hardware security.

Andalib Nizam

I am a Graduate Research Assistant at the University of Tennessee Knoxville, pursuing the PhD degree in Mixed-Signal Analog Circuit design.

Zhiyang Ong

Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.

Bertrand PIGEARD

Hello, I'm an IC Designer Analog/RF with digital skills. I worked mainly on PLL for mobile tranceivers. I used to work on Cadence Design flow for 20 years.

Mohamed Gaber

Skills

C/C++

Area of Expertise

CAD: Tool Development

Marc Rose

For most of my career, I was a CAD technology innovator and CAD system architect at Intel Corporation. I signed up recently for a Udemy class called "VSD - Making the Raven Chip: How to Design a RISC-V SoC." The class pointed me to Efabless.

Damien Bonneau

R&D Engineer, interest in synthesis and verification software for electronics and photonics hardware

Tony Moura

Skills

Python

Area of Expertise

CAD: Tool Development

Amel Chenouf

Amel is an Digital IC designer interested , used to work on HDL based Design for testability, Formal verification of Semi custom and IP based SOC DFT. Currently, working on IC design for Reliability. She designed a Test structures chip for Bias Temperature Instability characterization and analysis using TSMC 180nm Technology.

Dimitri del Marmol

I would like to improve the tooling for open ASIC development and education with Rudder: https://github.com/0x01be/rudder

Area of Expertise

CAD: Tool Development

Barry Muldrey

Assistant Professor of ECE at University of Mississippi

chin keong Lam

founder of patho.ai, using latest ai tech to accelerate pathology and drug discovery research using custom HDL HPC computation power of performing insilico simulation and compounds search and discovery.

Skills

Verilog

Area of Expertise

CAD: Tool Development

Downtime

Skills

Python

Area of Expertise

CAD: Tool Development

Gajanan Dinkar Chavan

Hi , I am Gajanan Chavan I am a passionate individual with a deep love for computers. My skills encompass C++, HTML, CSS, Bootstrap, Python programming, and data structures. Currently, I am pursuing a degree in Electronics and Telecommunication at SGGSIE&T in Nanded, Maharashtra. My goal is to continuously enhance my knowledge and expertise in the field of computer science and contribute to innovative projects and solutions. I am eager to connect with like-minded professionals and explore opportunities that allow me to apply my skills and contribute to the ever-evolving world of technology.

cad navigation

Skills

Python

Area of Expertise

CAD: Tool Development

Lance J Lueloff

From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...