Trained as a Software Engineer, i am an advocate for Libre Ethical Technology in business.
Silicon Design Engineer
Linkedin - https://www.linkedin.com/in/bhawandeep-singh-1b164517/ PhD student in CSE department in UCSC, advised by Prof. Jose Renau. My areas of majors are CPU design, digital design and embedded software.
10 years exp. ASIC development. MSU professor.
Current working in my PhD at BarcelonaTech.
HW development engineer
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
Senior Design Engineer at NASA-Goddard., Greenbelt, MD
Electrical engineer with over 7 years of experience in the semiconductor industry. Working experience in Analog IC Design, Silicon/FPGA Lab bring-up and testing, FPGA Prototyping/Emulation & ASIC/SoC Design,
IC Design Engineer
I'm hardworking, I'm smart at doing things, I'm analytical, and passionate to my work. I love to do programming.
I am Electronic Engineer from Chile, I like DSP and radioastronomy applications an ordinary guy
Graduate student of ECE department Ain Shams University, and Currently Master Student of ECE department Cairo University with major of Electronics design.
Paulo Roberto B. de Carvalho is a Hardware and Digital IC Design Engineer with 6-years experience in microelectronic area in Digital IC Design, with specialization in RTL design optimization for area and power reduction, Verification and Physical Implementation flow. He has 10-years experience in Application Engineering, technical consultant and semiconductors manufacture processes. He received his bachelor degree in materials, processes and electronic components technology at Faculdade de Tecnologia de Sao Paulo (FATEC-SP) in 2006. In 2011, he joined the Brazillian Federal Government IC Brazil Program of the Ministry of Science, Technology and Innovation (MCTI), trained in Digital Systems Design area. He received his Master of Science degree in Electric Engineering with specialization in Microelectronic area on Integrated Systems Laboratory at Electrical Engineering Department of Polytechnic School of University of Sao Paulo in 2016.
Learner for life
35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.
I am researcher with goals of developing high end technologies for the future.
Semiconductor professional with 40 years experience. I act as a technical consultant, design consultant, or architect for SoCs, embedded systems etc.
Associate Professor (Electrical and Electronic Engineering) Implantable chip design Low power sensors
Mixed background in computer science, applied mathematics and electrical engineering. Expert in algorithms to custom core development, system architecture, integration and functional verification.
Electronics Engineer and Researcher with a demonstrated history of working in the higher education industry. Skilled in CAD/EDA tools for ASIC, PCB and FPGA design, scripting and programming. Education professional with a PhD in Electrical Engineering and Computer Science from University of Nis, Faculty of Electronic Engineering Nis, Serbia.
An experimental physicist through sensor and instrumentation development.
Managing Partner
Research engineer and teaching assistant in microelectronic, microsystems and bioelectronic at the university of Liège, Belgium
Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.
I am enthuastic engineer who has been doing software engineering (Linux kernel), electronics, and now chip designs. My day job is leading teams (senior director) focusing on virtualization and security.
ASIC architect and designer. Specialize in deep learning, video, image and signal processing, and compression. Professor of Electrical and Computer Engineering at The College of New Jersey.
I'm a physics major studying at UC Berkeley interested in accelerating research and computational workloads with modern VLSI and FPGA tech.
Assistant Professor (IISc) | Ph.D. & S.M. (MIT) | B.Tech. (IIT-KGP)
I'm an engineer with both software and hardware background. I'm building next generation distributed storage system.
I am a Master's student who has to know for learning and do experiments as well as for writing technical blogger. My website links are given below to connect with my open-source family of the VLSI champions. https://nishitnathwani.blogspot.com/ https://geniusvlsi.blogspot.com/
I am a PhD student at Universiti Kebagsaan Malaysia. My research interests include application-specific hardware design, mainly to accelerate machine learning applications.
I am an Assistant Professor in Electronics Dept. UET Taxila, Pakistan. I did my PhD from VLSI Lab Politecnico di Torino, Italy. My research interests are digital hardware implementation of Communication and DSP algorithms.
I just finished electrical and electronics engineering. I want to develop myself in the semiconductor field
Researcher and Professor at the National University of Córdoba, Argentina. Actual Research areas: microelectronics, embedded systems, Digital Signal Processing
Roman Gauchi received the M.Sc. in Electrical Engineering from Polytech Grenoble, France in 2017 and the Ph.D. in Electrical Engineering from CEA-LIST, Grenoble, and University of Grenoble Alpes, France in 2021. Dr. Gauchi is a Postdoctoral Research Associate at the University of Utah, since March 2021. His main research interests are emerging technologies and reconfigurable architectures, digital integrated circuit design and embedded software.
Principal engineer leading PNT product development at GE Aerospace
A researcher and VLSI guy
Digital design engineer Msc Student at cairo university Faculty of Engineering
I am passionate about all areas of VLSI Design and trying my level best to be an expert in the entire flow, analog, digital and mixed signal. Beyond chips, I like poetry, skating, skydiving, late night swimming and trekking in no particular order.
Experienced SW developer (C/C++/C#) and digital HW designer (SoC/FPGA)
working as Assistant Professor in Sree Vidyanikethan engineering college, Tirupati.
I am a PhD student at National University of Sciences and Technology, Islamabad
Hardware Systems Architect at AroLeap
Hardware Design Engineer with 7 years of experience in RTL/SoC/FPGA Design, Integration, and Verification. Proficient in Front End Design tools and methodologies. Passionate about IC Design/Fabrication, AI, and IoT prototyping.
My area of interest is Analog and Mixed signal circuit design. I teach Electronic Circuit, VLSI design and Signals & Systems for under graduate students and Analog Integrated Circuit Design, Data Converters and Clock & power management circuit courses for Masters students. I also teach VLSI lab courses for both both undergraduate and masters students. Every year I supervise both undergraduate and masters students in analog circuit design projects. Presently I am involved in SRC project as Co-task leader in Analog and Mixed Signal circuit verification project using Machine learning techniques.
hi, i am jawad. I have done my bachelors in electrical engineering from UET Lahore, Currently, as a research student, i am interested in SoC's. My future goals is to develop expertise in analog, mixed signal and RF circuits designs.
I am a Senior Undergraduate in Electrical Engineering Department at IIT Gandhinagar, India. VLSI Design and the ability to tweak at the hardware level interest me a lot!
ASIC and FPGA design and verification Engineer with a sideline in bring devops to Hardware projects
Test Engineer
Microelectronics enthusiastic. Testing engineer at Mirgor Argentina SA and Researcher at National University of Technology Regional Buenos Aires.
Received B.S. degree from Electrical and Electronics Engineering in Middle East Technical University, Turkey, in 2019. Currently, pursuing M.S. degree from Electronics Engineering in Bogazici University, Turkey. Research interests are computer architecture, hardware security and secure memory architecture
Digital System Designer.
Assistant Professor at the Mechanical and Aerospace Engineering Department. The Henry Samueli School of Engineering. University of California, Irvine.
I am the founder of Aurifex Labs LLC. I have a degree in EE and have a strong interest in computer architecture, but have been a software developer/entrepreneur professionally. I also have a little audio DSP background. I created Prospero.Live, a collaborative software development platform.
Senior software engineer in Tron Future Tech. My work is related to CPU/FPGA heterogeneous computing for radar signal processing. Capable of designing RTL IP, implementing Linux kernel driver and system software programming.
