Trained as a Software Engineer, i am an advocate for Libre Ethical Technology in business.
Silicon Design Engineer
Linkedin - https://www.linkedin.com/in/bhawandeep-singh-1b164517/ PhD student in CSE department in UCSC, advised by Prof. Jose Renau. My areas of majors are CPU design, digital design and embedded software.
10 years exp. ASIC development. MSU professor.
Current working in my PhD at BarcelonaTech.
HW development engineer
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
Senior Design Engineer at NASA-Goddard., Greenbelt, MD
Electrical engineer with over 7 years of experience in the semiconductor industry. Working experience in Analog IC Design, Silicon/FPGA Lab bring-up and testing, FPGA Prototyping/Emulation & ASIC/SoC Design,
IC Design Engineer
I'm hardworking, I'm smart at doing things, I'm analytical, and passionate to my work. I love to do programming.
I am Electronic Engineer from Chile, I like DSP and radioastronomy applications an ordinary guy
Graduate student of ECE department Ain Shams University, and Currently Master Student of ECE department Cairo University with major of Electronics design.
Paulo Roberto B. de Carvalho is a Hardware and Digital IC Design Engineer with 6-years experience in microelectronic area in Digital IC Design, with specialization in RTL design optimization for area and power reduction, Verification and Physical Implementation flow. He has 10-years experience in Application Engineering, technical consultant and semiconductors manufacture processes. He received his bachelor degree in materials, processes and electronic components technology at Faculdade de Tecnologia de Sao Paulo (FATEC-SP) in 2006. In 2011, he joined the Brazillian Federal Government IC Brazil Program of the Ministry of Science, Technology and Innovation (MCTI), trained in Digital Systems Design area. He received his Master of Science degree in Electric Engineering with specialization in Microelectronic area on Integrated Systems Laboratory at Electrical Engineering Department of Polytechnic School of University of Sao Paulo in 2016.
Learner for life
35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.
I am researcher with goals of developing high end technologies for the future.
Semiconductor professional with 40 years experience. I act as a technical consultant, design consultant, or architect for SoCs, embedded systems etc.
Associate Professor (Electrical and Electronic Engineering) Implantable chip design Low power sensors
Mixed background in computer science, applied mathematics and electrical engineering. Expert in algorithms to custom core development, system architecture, integration and functional verification.
Electronics Engineer and Researcher with a demonstrated history of working in the higher education industry. Skilled in CAD/EDA tools for ASIC, PCB and FPGA design, scripting and programming. Education professional with a PhD in Electrical Engineering and Computer Science from University of Nis, Faculty of Electronic Engineering Nis, Serbia.
An experimental physicist through sensor and instrumentation development.
Managing Partner
Research engineer and teaching assistant in microelectronic, microsystems and bioelectronic at the university of Liège, Belgium
Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.
I am enthuastic engineer who has been doing software engineering (Linux kernel), electronics, and now chip designs. My day job is leading teams (senior director) focusing on virtualization and security.
ASIC architect and designer. Specialize in deep learning, video, image and signal processing, and compression. Professor of Electrical and Computer Engineering at The College of New Jersey.
I'm a physics major studying at UC Berkeley interested in accelerating research and computational workloads with modern VLSI and FPGA tech.
Assistant Professor (IISc) | Ph.D. & S.M. (MIT) | B.Tech. (IIT-KGP)
I'm an engineer with both software and hardware background. I'm building next generation distributed storage system.
I am a Master's student who has to know for learning and do experiments as well as for writing technical blogger. My website links are given below to connect with my open-source family of the VLSI champions. https://nishitnathwani.blogspot.com/ https://geniusvlsi.blogspot.com/
I am a PhD student at Universiti Kebagsaan Malaysia. My research interests include application-specific hardware design, mainly to accelerate machine learning applications.
I am an Assistant Professor in Electronics Dept. UET Taxila, Pakistan. I did my PhD from VLSI Lab Politecnico di Torino, Italy. My research interests are digital hardware implementation of Communication and DSP algorithms.
I just finished electrical and electronics engineering. I want to develop myself in the semiconductor field
Researcher and Professor at the National University of Córdoba, Argentina. Actual Research areas: microelectronics, embedded systems, Digital Signal Processing
Roman Gauchi received the M.Sc. in Electrical Engineering from Polytech Grenoble, France in 2017 and the Ph.D. in Electrical Engineering from CEA-LIST, Grenoble, and University of Grenoble Alpes, France in 2021. Dr. Gauchi is a Postdoctoral Research Associate at the University of Utah, since March 2021. His main research interests are emerging technologies and reconfigurable architectures, digital integrated circuit design and embedded software.
Principal engineer leading PNT product development at GE Aerospace
A researcher and VLSI guy
Digital design engineer Msc Student at cairo university Faculty of Engineering
I am passionate about all areas of VLSI Design and trying my level best to be an expert in the entire flow, analog, digital and mixed signal. Beyond chips, I like poetry, skating, skydiving, late night swimming and trekking in no particular order.
Experienced SW developer (C/C++/C#) and digital HW designer (SoC/FPGA)
working as Assistant Professor in Sree Vidyanikethan engineering college, Tirupati.
I am a PhD student at National University of Sciences and Technology, Islamabad
Hardware Systems Architect at AroLeap
Hardware Design Engineer with 7 years of experience in RTL/SoC/FPGA Design, Integration, and Verification. Proficient in Front End Design tools and methodologies. Passionate about IC Design/Fabrication, AI, and IoT prototyping.
My area of interest is Analog and Mixed signal circuit design. I teach Electronic Circuit, VLSI design and Signals & Systems for under graduate students and Analog Integrated Circuit Design, Data Converters and Clock & power management circuit courses for Masters students. I also teach VLSI lab courses for both both undergraduate and masters students. Every year I supervise both undergraduate and masters students in analog circuit design projects. Presently I am involved in SRC project as Co-task leader in Analog and Mixed Signal circuit verification project using Machine learning techniques.
hi, i am jawad. I have done my bachelors in electrical engineering from UET Lahore, Currently, as a research student, i am interested in SoC's. My future goals is to develop expertise in analog, mixed signal and RF circuits designs.
I am a Senior Undergraduate in Electrical Engineering Department at IIT Gandhinagar, India. VLSI Design and the ability to tweak at the hardware level interest me a lot!
ASIC and FPGA design and verification Engineer with a sideline in bring devops to Hardware projects
Test Engineer
Microelectronics enthusiastic. Testing engineer at Mirgor Argentina SA and Researcher at National University of Technology Regional Buenos Aires.
Received B.S. degree from Electrical and Electronics Engineering in Middle East Technical University, Turkey, in 2019. Currently, pursuing M.S. degree from Electronics Engineering in Bogazici University, Turkey. Research interests are computer architecture, hardware security and secure memory architecture
Digital System Designer.
Assistant Professor at the Mechanical and Aerospace Engineering Department. The Henry Samueli School of Engineering. University of California, Irvine.
I am the founder of Aurifex Labs LLC. I have a degree in EE and have a strong interest in computer architecture, but have been a software developer/entrepreneur professionally. I also have a little audio DSP background. I created Prospero.Live, a collaborative software development platform.
Senior software engineer in Tron Future Tech. My work is related to CPU/FPGA heterogeneous computing for radar signal processing. Capable of designing RTL IP, implementing Linux kernel driver and system software programming.
I am interested in new things. I've designed chips from definition to polygons, mostly in the pursuit of new capabilities.
I am interested in Robotics and Bioengineering. A holistic approach can lead to developing optimal systems. The co-design of cyber-physical systems must take into account the biological and mechanical models, hardware, and software. I search for the application of mathematical representation of models by algebraic geometry, topology, and energy fields. The study of mathematical concepts can lead to hardware and software design that solve complex dynamical systems.
I am an Electrical and Computer Engineer. I run an engineering, design and manufacturing firm in Milpitas, CA. We design and manufacture various electronic products, including image sensors and image processing compute hardware.
I am an electrical engineer
Dad. Partner. Scientist. Activist. Maker. — He/Him
I am a PhD. Telecommunication Engineer with 25 years of working experience in the industry. I started my career in 1997 as an IC Design Engineer, then I moved to other technical and management roles in the semiconductor and aerospace industries. Since 2017 I am also teaching IC Design at University for MsC. graduate students.
IC design Engineer
Post-doctoral research fellow in the discipline of Software and Systems, School of Computer Science and Statistics, Trinity College Dublin, with a keen interest in learning new things, specially related to computer science and engineering. Around 4 years experience of teaching and research and more than 10 years of experience in architecture design, optimization, analysis, implementation and verification of digital and digital signal processing systems on FPGAs and ASICs. Diversifying research career by working on quantization of deep convolution neural networks. Author of three peer reviewed journal publications and five international conference publications.
electronic system designer / software and hardware engineer, embeded system expert, signal expert, proccess designer, researcher, Developer of complexity and reversal wantings. Reverse engineer. i addopt my whole life to this science. thank you for presentings of quantum, psych
I am Dr. Naushad Alam working as an Associate Professor in the Department of Electronics Engineering, Z H College of Engineering & Technology, Aligarh Muslim University, Aligarh, India. I received B. Tech. degree in Electronics & Communication Engineering from Jamia Millia Islamia, New Delhi in 2003, and M. Tech. Degree in Electronic Circuits & Systems Design from Aligarh Muslim University, Aligarh in 2009. I earned Ph.D. degree in Microelectronics from Indian Institute of Technology Roorkee, India in 2013. My doctoral work was on nanoscale circuit design considering the impact of process-induced mechanical stress. He has published 29 papers in SCI indexed journals that include 10 IEEE Transactions and 33 papers in reputed conferences. I have supervised two PhD thesis in the area of device-circuit co-design and presently supervising two more PhD students. I have also successfully executed a UGC funded research project on TFET based SRAM cell design for IoT Applications. My research interests include device-circuit co-design, robust nanoscale circuit design, low power circuit design, PVT tolerant circuit design, Near-Threshold/Sub-Threshold circuit design etc.
Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.
Independent Digital Design and Verification Expert with more than 20+ years of experience and founder of semify. While working for established semiconductor companies like Infineon, Dialog Semiconductor and NXP I was responsible for bringing ideas into working ASICs. I developed USound’s first ASIC from FPGA based prototyping to tapeout with minimal resourcing, demanding timeline and tight area and power consumption constraints. Currently I'm acting as a consultant for easyIC and Cypress / Infineon. In addition I'm is also lecturer at the FH Joanneum Graz and guest lecturer at the Technical University Graz.
RISC-V Enthusiast GSoC 2020 @ FOSSi Foundation RA @ CAD Lab, IISc Bengaluru, India EE Senior @ NITK Mangalore, India
Electronic Engineer with experience in RF/AMS IC Design and other electronics and telecommunications projects. Served in working groups and also as leader. Has also experience in entrepreneurship. PhD in Microelectronics. Currently Adjunct Professor at Federal University of Semi-Árid Region - UFERSA and Head of LIEB/LAMERF Research Labs where develop R&D projects in the areas of instrumentation, biomedical engineering, RF/MW circuits and microelectronics.
I am designed mixed signal ICs for Music, Audio, IoT and sensor applications.
I am a EE with decades of experience in multiple disciples including analog, RF, bio-engineering, embedded systems design, ... a long list. I've had a long career and am fortunate to be able to follow my interest where ever they might be.
i'm an eletronic engineer there are studing to became an IP desing
Dad. Partner. Scientist. Activist. Maker. — He/His
Software engineer who's increasingly interested in hardware and ISAs.
Just a person trying to build a fully featured RISC-V micro-controller and looking cool :)
I am Pratika Tripathi. I am in my final year of Btech. I am very interested in physical designing of IC. I had even taken 3 courses of kunal ghosh sir on physical design, stay, and cts. I am doing my final year project in physical design.
R&D Engineer, interest in synthesis and verification software for electronics and photonics hardware
I'm a PhD student working to make mixed-signal chip design more accessible, drawing inspiration from software development techniques. Prior to starting the PhD program, I spent a number of years working in industry at both the chip- and PCB-level on optical sensors and power systems.
Hello everybody! I am a FPGA developer in Croatia, I do FPGA project and am starting ASIC design as another careere choice.
Hi, I'm an Electrical & Computer Engineering + Computer Science student at Oregon State University.
Digital Systems and Software Engineer (formerly in management VP and Director of engineering).
Working on a PhD in electronics and nanofabrication at the University of Glasgow. Interested in designing CPUs and SoCs with RISC-V.
I am a final year B.Tech undergrad from India highly passionate about digital system design.
A bit of everything - mostly focused on networking system level designs / FPGA / Switch Fabric from concept to validation - and now automotive
Osaze Shears is passionate about many engineering and computational concepts. These include embedded systems, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and microprocessor technologies. Osaze spends his free time tutoring other students who are interested in learning to become better computer scientists and engineers to benefit the greater society. Osaze is currently a PhD student at Virginia Tech conducting research under the Multifunctional Integrated Circuits and Systems (MICS) lab. His research interests include: • Spiking Neural Networks • Hardware Acceleration • SoC Design with ASICs and FPGAs • Deep Learning • Edge Computing
Enthusiastic VLSI Design Engineer currently working in Domain Specific Architectures
ASIC design engineer at Google advancing high-level synthesis and next-generation computer architectures.
Digital Design Engineer
I've done everything from silicon design at the "bottom of the stack" to System Architecture and Design (with plenty of SW to go with it; at every level)
Hardware System Designer from ASIC chip to board to SOC platform
Starting small and hopefully moving towards big ideas. Interest in FPGAs, HDLs and Open Source Software and Hardware. Several decades of IT business experience.
A software developer, technology manager, and hardware tinkerer aspiring to imbue slices of crystals with intelligence.
I am a current Master's student in IC (Integrated Circuit) and Systems Design, as well as a Research Assistant at the Micro Nanoelectronics (MiNE) Lab located at SEECS NUST. I completed my Bachelor's degree in Electronics Engineering from UET Peshawar. As a member of the MiNE Lab team, I am involved in cutting-edge research in the field of micro and nanoelectronics, with a specific focus on the design and development of integrated circuits and systems. My academic and research background has provided me with a strong foundation in electronics engineering, and I am passionate about utilizing my skills to contribute to the development of innovative technologies in this field.
EE PCB, Systems, Mechnical, Cooling, Power Used to sling a lot of gates (polygons) in esoteric processes (Gallium Arsenide, JJ)
Graduate student in MIT EECS trying to combine stochastic MTJ devices to silicon
i am a vlsi enthusiast
Berna Örs Yalçın received the Electronics & Communication Engineering degree and the MSc degree in 1995 and 1998, respectively, both from the Istanbul Technical University (ITU), Turkey. She received the Electrical Engineering degree in applied sciences from the Katholieke Universiteit Leuven, Belgium, in 2005. Currently, she is a Professor at ITU. Her main research interests include cryptography, embedded systems, and side-channel attacks.
I'm wireless research to make prototype to probe new wireless technology
Sr. Electrical Engineer with 40 years of experience, doing R&D, circuit design from concept through layout and to production in Aerospace, Automotive, Industrial and Gas and Oil down-hole business sectors.
RTL design engineer with experience developing mobile GPUs (Samsung), high-end networking ASICs (Juniper) and CPU cores (MIPS). Co-author of lab manuals and online courses on FPGA design, RTL2GDSII flow and computer architecture. Founder of Verilog Meetup, a Silicon Valley and online community that develops open-source SystemVerilog examples targeting three niches: beginners, students who want to prepare for microarchitectural job interviews and university professors who want to avoid FPGA vendor lock (our examples are interoperable between Xilinx, Altera, Gowin and Lattice and compatible with ASIC flows, such as TinyTapeout and eFabless (in progress)).
University researcher
Graduated as electronic engineer in '93. Think it could be nice and fun to try out this part of the electronic life/world :). I have worked a lot with digital designs over the years, everything from small LED controllers to larger computer boards. And then I am a PCB geek.
FPGA/HW engineer
Product design and development
Three decades in SoC architecture and system designing . Motion control, sensor design and electro-optics,
Microwave/RF Electrical Engineer. Love learning new things.
Experienced in software engineering and offensive cybersecurity, I specialize in wireless networking security, cellular communication security, and cryptanalysis. Proficient in C, C++, and Python, I excel in scripting and automation. Currently delving into embedded system design, focusing on FPGA and ASIC.
Seasoned VLSI professional with experience in complete chip design flow, domain experience data communication and telecom.
ASIC Designer with experience in Back-end & Front-end stages for ASIC design flow.
Electrical Engineer with five years of expertise in FPGA Design and Embedded Systems, cultivated through roles at prestigious organizations like RapidSilicon, Pakistan Air Force, and NRTC. Proficient in RTL design, verification, and protocol implementation. Experienced in scripting, simulation tools, and FPGA technologies. Seeking dynamic career opportunities to further enhance complex digital design systems and contribute to semiconductor innovation.
From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...
Embedded Software designer
I am really interested in Research for progressing my work in RF electronics
I love to learn and make things. RF, power electronics and AI/ML get me really wondering, what could we do with all of them.
Hao-Yen Tang received his PhD degree from UC Berkeley Advised by Prof. Bernhard E. Boser, his PhD research, PMUT ultrasonic fingerprint sensor, convince InvenSense senior management to make a heavy investment to take this technology to mass market. At InvenSense he’s leading a multi-disciplinary system team for the next generation ultrasonic fingerprint sensor bringup, characterization and calibration, coordinating the works from different field including acoustic, MEMS, CMOS, FW, and SW. Currently, he serves as CTO/Co-Founder in the startup company UltraSense Systems. The company is aiming to transform any surface material into a Touch/Press user interface with it’s proprietary PiezoMEMS-CMOS technology. Dr. Tang is the recipient of 2016 ISSCC Best Paper Award (Lewis Winner Award for Outstanding Paper), 2015 SSCS Pre-Doctoral Award and 2015 ADI Outstanding Student Designer Award. Currently he holds 20+ granted patents, 20+ publications, and 2000+ citations.
Senior security researcher, compiler/binary hacker, NFC ninja, hardware hacker with a FPGA hammer. Previously Pay Security.
I am an alumnus of Masters in Electrical Engineering from Department of Electrical Engineering, University of Engineering and Technology, Lahore; the project should be shipped there. The address is: University of Engineering and Technology, Main Campus, G. T. Road, Lahore, Pakistan. Postal code: 39161
Software developer / electronics enthusiast
Technical Program Manager at Efabless Corporation
Berna Örs received the Electronics & Communication Engineering degree and the MSc degree in 1995 and 1998, respectively, both from the Istanbul Technical University (ITU), Turkey. She received the Electrical Engineering degree in applied sciences from the Katholieke Universiteit Leuven, Belgium, in 2005. Currently, she is a Professor at ITU. Her main research interests include cryptography, embedded systems, and side-channel attacks.
I am a professor in computer engineering at the Faculty of Computer and Information Science, University of Ljubljana, Slovenia. My research interests include computer architecture and organization, parallel processing, computer arithmetic, embedded systems, and VLSI design.
PhD in Electrical Engineering
RTL Design, GDS, VLSI
I am a final year Computer engineering student at Habib University. I am currently focused on in-depth study of RISCV architecture, and SoC design for Robots.
Pre-Final year at EEE, NITK. Looking to get hands dirty with an immense curiosity and interest in fields (and not limited to) Digital Design, CPU architecture and other fields under computer engineering. Crazy about new market innovations and always looking forward to new connections.
