Experienced Mixed Signal Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Data Conversion, Analog Circuit Design, CMOS and Mixed Signal. Strong engineering professional with a Master's degree focused in Electronics Engineering from Ain Shams University.
José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.
Previously Applications Engineer at Triad Semiconductor. Worked on ASICs in the Consumer, Medical and Automotive space. Hardware design background. Proficent in Firmware and FPGA. Passion for applications engineering and semiconductor product definition.
RF/Analog IC design and SOC
My name is Gary Bradley I'm from Ohio and I am looking forward to seeing if I can help with your project I am 56 years old and I have been married for 32 years and very happy with everything I have done in my life I just really look forward to helping you out thank you.
Microelectronics SME
administrator
Over 25+ years of experience Silicon Engineer with focus on taking a Silicon from GDS2 to PRQ. Involved in Wafersort testing, Packaging, Packaging Testing, Silicon Characterisation - Electrical & Functional, Package Qualification, Reliablity testing and Yield management
President and CEO
Product design and development
From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...