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"profiles" search for "area_of_expertise": Digital: DFT
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Number of Results: 104

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Sreedharan Baskara Dass

Skills

Tcl/Tk Verilog

Area of Expertise

Digital: DFT Digital: Synthesis
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Karthik Mahendra

Hi! It's good to see you being here, good to believe we have same interests. Coffee Design Debug Improve OpenSource

Skills

Python System Verilog vlsi

Area of Expertise

digital electronics Digital: DFT Digital: RTL Digital: Synthesis verilog
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WinStyle

Skills

C/C++ Python

Area of Expertise

Digital: DFT
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jatindersingh

Skills

Analog/Digital Circuit Design C/C++ Electric CAD Magic CAD ngspice Python System Verilog System-C Tcl/Tk Verilog VHDL VLSI/ASIC and SoC Development

Area of Expertise

Analog-SMPS Analog: Simulation Analog: Verification Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital-DV Digital-RTL Digital: DFT Digital: Placement and Routing Miscellaneous: Neural Networks SOC-DV SoC: ESD SoC: Floorplanning SoC: Verification System-DSP System: Chip Editing System: FPGA Programming
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Luc Wong

I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".

Skills

C/C++ Cadence Encounter Cadence Virtuoso Eldo Matlab Perl Python Software Developer Spectre SPICE Opus System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Business: Design Services Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks SoC: ESD SoC: Floorplanning SoC: Verification System: Chip Editing System: FPGA Programming System: PCB System: Power Integrity System: Signal Integrity System: Test Equipment System: Test Programming
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Finny Philip Biju

Skills

C/C++ Matlab Python Verilog VHDL

Area of Expertise

Academic: Research Academic: Student Analog: Design CAD: Tool Development Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT Digital: Verification System: Fabrication Process System: FPGA Programming System: PCB
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Gordon Aplin

IC Design Engineer

Skills

C/C++ Cadence Virtuoso Calibre Magic CAD ngspice Perl Tanner L-Edit Verilog VHDL

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming
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Praneeth

Skills

Cadence Encounter Cadence Virtuoso Hercules Perl Spectre Tcl/Tk Verilog VHDL

Area of Expertise

Circuits: Memory Circuits: Power Management Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis SoC: Floorplanning
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Owais Farooq

Skills

C/C++ Python System Verilog Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Verification SoC: Verification
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Shabab Alam

Skills

Cadence Virtuoso Magic CAD Matlab Netgen Python

Area of Expertise

Academic: Research Academic: Student Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Circuits: Memory Digital: DFT
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Mahmoud Abdelgawad

Skills

C/C++ Cadence Encounter Cadence Virtuoso Calibre Matlab Python System Verilog Tcl/Tk Verilog

Area of Expertise

Academic: Research Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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Leonel ACUNHA GUIMARAES

Skills

Cadence Virtuoso Verilog VHDL

Area of Expertise

Analog: Layout CAD: Tool Development Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis System: Test Programming
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Mostafa Elbediwy

Teaching assistant for ASIC/FPGA and digital ICs courses.

Skills

C/C++ Cadence Virtuoso Calibre Matlab System Verilog Verilog

Area of Expertise

Academic: Research Academic: Teaching Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification
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Jinwei

Skills

C/C++ Perl System Verilog Tcl/Tk Verilog

Area of Expertise

CAD: Scripting Digital: DFT Digital: RTL Digital: Synthesis
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Brian Glod

Skills

C/C++ Eagle CAD Python Tcl/Tk VHDL

Area of Expertise

Circuits: Communication Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming System: PCB System: Power Integrity System: Signal Integrity System: Test Equipment System: Test Programming
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Mauricio De Carvalho

Skills

C/C++ Cadence Encounter Software Developer System Verilog Verilog VHDL

Area of Expertise

Business: Design Services Circuits: Microcontrollers Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification SoC: Verification System: FPGA Programming
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harikrishna

Physical Design Engineer

Skills

C/C++ Cadence Encounter Cadence Virtuoso Calibre Tcl/Tk Verilog VHDL

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification
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Yuan Mei

An experimental physicist through sensor and instrumentation development.

Skills

C/C++ Cadence Encounter Cadence Virtuoso Calibre Leadership Matlab ngspice Python SKILL Software Developer Spectre Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research Analog: Design Analog: Modeling Analog: Simulation Analog: Verification CAD: Scripting CAD: Tool Development Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming System: PCB System: Signal Integrity System: Test Equipment System: Test Programming
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Jonathan Richard Robert Kimmitt

Research Associate at University of Cambridge

Skills

Verilog

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification
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Vachan U Bharadwaj

A recent graduate student from Syracuse University major in Electrical Engineering with focus in VLSI Designs

Skills

Cadence Encounter Cadence Virtuoso Eagle CAD Perl Tcl/Tk Verilog

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis System: PCB System: Signal Integrity
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Khaled Zaki Ahmed Hussein

MSC in Electrical Engineering BSC in Electronics Two patents in mathematical software in Engineering design and digital signal processing utility box Undergo private research for commercial use in the areas of very high frequency analog and digital circuits

Skills

C/C++ Software Developer VHDL analog and mixed signal circuits design digital circuits design

Area of Expertise

Analog: Design Business: Design Services Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT
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Pam

Learning, is growing

Skills

Cadence Virtuoso

Area of Expertise

Digital: DFT Digital: Verification SoC: Verification System: Test Programming
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Andrew Downie

Skills

C/C++ Matlab Python VHDL

Area of Expertise

Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT Digital: RTL System: FPGA Programming
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Nimit Jain

Skills

Cadence Virtuoso Matlab Spectre

Area of Expertise

Academic: Research Analog: Design Analog: Simulation Circuits: Signal Processing Digital: DFT
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Constantin Runge

Skills

C/C++ Cadence Virtuoso Matlab ngspice Python Software Developer Spectre Julia

Area of Expertise

Academic: Student Analog: Design Analog: Simulation Circuits: Filters Circuits: Signal Processing Digital: DFT Miscellaneous: Neural Networks
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Jan Pleskac

Skills

Leadership System Verilog Verilog VHDL

Area of Expertise

Business: Design Services Business: Management Digital: DFT Digital: RTL Digital: Verification
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Nicola Scantamburlo

Skills

Cadence Virtuoso Calibre ngspice

Area of Expertise

Analog: Design Analog: Layout Digital: DFT Digital: Placement and Routing
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Moon Lake Sun

Skills

C/C++ SPICE Opus Verilog

Area of Expertise

Academic: Teaching Analog: Design Digital: DFT System: Test Equipment
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Cairo Caplan

Skills

C/C++ ngspice Perl Python Software Developer System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research Analog: Simulation Analog: Verification Circuits: Microcontrollers Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming System: Test Equipment System: Test Programming
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Daniel Kluss

Skills

C/C++ Software Developer Tcl/Tk Verilog VHDL

Area of Expertise

Analog: Design Analog: Verification Business: Design Services Business: Foundry Services Business: Management Business: Marketing Business: Patents CAD: Tool Development Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography System: Fabrication Process System: FPGA Programming
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Kranthi Kumar Pamarthi

I am passionate about all areas of VLSI Design and trying my level best to be an expert in the entire flow, analog, digital and mixed signal. Beyond chips, I like poetry, skating, skydiving, late night swimming and trekking in no particular order.

Skills

Magic CAD Matlab Netgen ngspice Octave Python System Verilog Tcl/Tk Verilog VHDL perl

Area of Expertise

Academic: Research Academic: Student CAD: Scripting Circuits: Filters Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks System: FPGA Programming
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Chad Kersey

Skills

C/C++ ngspice Verilog

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis
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Nicholas Molinski

Skills

C/C++ Electric CAD Matlab ngspice Python Software Developer Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks SoC: Floorplanning SoC: Verification System: FPGA Programming System: PCB System: Power Integrity System: Signal Integrity System: Test Programming
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Krithik Sankar

Skills

C/C++ Magic CAD Perl Python Tcl/Tk Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Verification
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Frank Hsu

Skills

Perl Tcl/Tk Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis
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chipforge

Skills

Magic CAD ngspice Octave Verilog VHDL

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming System: Signal Integrity
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Syed Muhammad Sarmad

I am a PhD student at National University of Sciences and Technology, Islamabad

Skills

C/C++ Cadence Encounter Matlab

Area of Expertise

Academic: Research Circuits: Microcontrollers Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming System: PCB System: Signal Integrity
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Suraj Kothari

Skills

Perl Verilog

Area of Expertise

Digital: DFT Digital: RTL System: FPGA Programming
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Aloke Das

Skills

C/C++ Leadership Perl Software Developer Tcl/Tk Verilog

Area of Expertise

Business: Design Services CAD: Scripting CAD: Tool Development Circuits: Microcontrollers Digital: DFT Digital: RTL
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Marco Crescentini

Skills

C/C++ Cadence Virtuoso Calibre Eldo Matlab Spectre

Area of Expertise

Academic: Research Academic: Teaching Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Circuits: Sensors Circuits: Signal Processing Digital: DFT SoC: Floorplanning System: Chip Editing System: Power Integrity System: Signal Integrity System: Test Equipment System: Test Programming
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Greg Hogan

Test Engineer

Skills

C/C++ Software Developer

Area of Expertise

Business: PCB Manufacture Circuits: Microcontrollers Digital: DFT System: FPGA Programming System: Quality Assurance System: Test Equipment System: Test Programming
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Dhayalakumar

Digital System Designer.

Skills

Cadence Encounter Cadence Virtuoso Leadership Matlab Python System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research Circuits: Communication Digital: DFT Digital: RTL Digital: Synthesis System: FPGA Programming
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Gerrit Grutzeck

Skills

C/C++ Electric CAD Python Software Developer VHDL

Area of Expertise

Academic: Research Circuits: Signal Processing Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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Marek Janský

Skills

C/C++ Cadence Encounter Eagle CAD Electric CAD Matlab

Area of Expertise

Academic: Research Academic: Student Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks System: FPGA Programming System: PCB System: Signal Integrity
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Sam Lim

I am a novice, building a Test chip for the first time

Skills

C/C++ Perl Python Software Developer Tcl/Tk Verilog

Area of Expertise

CAD: Scripting Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification SoC: Verification System: Fabrication Process System: FPGA Programming System: Quality Assurance System: Signal Integrity System: Test Equipment System: Test Programming
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Wentong Chen

Skilled IC designer

Skills

Python System Verilog Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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leonardo valencia

ASIC engineer

Skills

C/C++ Cadence Virtuoso Calibre Octave Spectre System Verilog Verilog VHDL

Area of Expertise

Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis System: FPGA Programming
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Ufuk Yıldırım

Skills

C/C++ Verilog VHDL

Area of Expertise

Digital: DFT
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Zulfiqar Ali

I am an Electronics Engineer now continuing my MS in electronics from COMSATS Abbottabad in Analogue Chip Design.

Skills

C/C++ Cadence Virtuoso Electric CAD Leadership Matlab Python Verilog

Area of Expertise

Academic: Student Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification
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E-Jen Lien

IC design Engineer

Skills

C/C++ Cadence Virtuoso Calibre Leadership Matlab Octave Perl Python Software Developer Spectre Verilog

Area of Expertise

Analog: Simulation Analog: Verification Business: Design Services Business: Patents CAD: Scripting CAD: Tool Development Circuits: Microcontrollers Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography SoC: Floorplanning SoC: Verification System: Chip Editing System: Fabrication Process System: FPGA Programming
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Sherif Abouzeid

Skills

C/C++ Matlab Python System Verilog Verilog VHDL

Area of Expertise

Academic: Research Business: Management Circuits: Communication Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: Chip Editing
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Branden Allen

Skills

C/C++ Leadership Magic CAD ngspice Perl Python System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research Analog: Design Analog: Simulation Analog: Verification Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Synthesis System: FPGA Programming
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Muhammad Farid Ud Din

Skills

C/C++ Cadence Virtuoso Calibre Matlab Python Spectre Verilog

Area of Expertise

Academic: Research Academic: Student Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis System: Packaging System: PCB System: Signal Integrity
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Narsepalli Pradyumna

Skills

C/C++ Cadence Virtuoso Matlab Python Spectre Verilog

Area of Expertise

Academic: Student Digital: DFT Digital: RTL Digital: Synthesis System: FPGA Programming
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SAPTARSHI GHOSH

Skills

Perl Python System Verilog Tcl/Tk Verilog dft

Area of Expertise

Digital: DFT
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Alexander Stanitzki

Analog/MS/RF IC designer

Skills

C/C++ Cadence Encounter Cadence Virtuoso Diva Leadership Python SKILL Spectre Verilog

Area of Expertise

Analog: Design Analog: Layout Business: Design Services Circuits: Communication Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis System: Fabrication Process
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Santosh Kumar

Skills

Verilog

Area of Expertise

Digital: DFT
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Chaitanya CVS

Skills

Perl System Verilog System-C Verilog

Area of Expertise

Academic: Research CAD: Scripting CAD: Tool Development Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography SoC: Verification System: FPGA Programming
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ADITYA ANAND

Skills

Cadence Encounter Matlab ngspice Python System Verilog Tcl/Tk Verilog

Area of Expertise

Circuits: Communication Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis SoC: Floorplanning System: FPGA Programming System: Signal Integrity
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Raghu

Skills

Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis
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Amel Chenouf

Amel is an Digital IC designer interested , used to work on HDL based Design for testability, Formal verification of Semi custom and IP based SOC DFT. Currently, working on IC design for Reliability. She designed a Test structures chip for Bias Temperature Instability characterization and analysis using TSMC 180nm Technology.

Skills

Cadence Virtuoso Calibre Relxpert Spectre

Area of Expertise

Academic: Research Analog: Design Analog: Layout CAD: Tool Development Circuits: Memory Digital: DFT
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Vipul Lengade

A curious VLSI engineer

Skills

Python Tcl/Tk Verilog

Area of Expertise

Digital: DFT
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Ryan Dewey

Skills

C/C++ Cadence Virtuoso Magic CAD Python Verilog VHDL

Area of Expertise

Academic: Research Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks SoC: Floorplanning
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Ricardo Godinez

Skills

Python Tcl/Tk Verilog DFT

Area of Expertise

Digital: DFT Digital: RTL
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Muhammed Ceylan Morgul

UVA HPLP

Skills

C/C++ Cadence Virtuoso Matlab Python Spectre Verilog VHDL

Area of Expertise

Academic: Research Academic: Student Circuits: Memory Circuits: Microcontrollers Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks SoC: Floorplanning System: Test Equipment
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Klaus V

Analog mixed signal Asic design

Skills

Cadence Virtuoso Calibre Diva Matlab Octave Perl SKILL Spectre Verilog VHDL

Area of Expertise

Analog: Design Analog: Layout Analog: Simulation Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: RTL Digital: Synthesis System: Packaging
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Bharath A R

Skills

Python System Verilog Verilog C

Area of Expertise

Digital: DFT Digital: RTL Digital: Verification
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Ray Harker

Skills

C/C++ Eagle CAD Matlab Software Developer Verilog

Area of Expertise

Analog: Design Analog: Layout Business: PCB Manufacture Circuits: Communication Circuits: Memory Circuits: Microcontrollers Circuits: Sensors Circuits: Signal Processing Digital: DFT System: FPGA Programming System: PCB System: Test Equipment
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Gagan Gupta

I am an enthusiastic proponent of open source hardware. See my position paper on the topic: https://ieeexplore.ieee.org/document/7945172.

Skills

C/C++ Leadership System Verilog System-C Verilog VHDL

Area of Expertise

Academic: Research Business: Management Business: Marketing Business: Patents Business: Sales Digital: DFT Digital: RTL SoC: Verification
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ADROITEC SYSTEMS PVT LTD

Adroitec Systems is design Services Company for the VLSI and Embedded Software. Founded in 2017, Adroitec Systems is having Register Office at Visakhapatnam with branch offices in Bangalore. Adroitec Systems delivers cutting edge solutions across a diverse portfolio of services including Physical Design, Physical Verification, and Design Verification. With about 50 highly qualified employees.

Skills

Cadence Encounter Cadence Virtuoso Calibre Verilog

Area of Expertise

Analog: Simulation Business: Design Services Business: Foundry Services Circuits: Power Management Digital: DFT Digital: Placement and Routing Digital: RTL Miscellaneous: Neural Networks SoC: Verification
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Joey Taylor

Skills

C/C++ Eagle CAD ngspice Python System Verilog Verilog

Area of Expertise

Circuits: Communication Circuits: Filters Circuits: Microcontrollers Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: RTL Digital: Verification Miscellaneous: Cryptography Miscellaneous: Neural Networks System: FPGA Programming
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Richard Howlett

Engineer / VP

Skills

C/C++ Leadership Octave Perl Python Scilab

Area of Expertise

Analog: Design Analog: Simulation Business: Management Business: Marketing Business: Patents CAD: Scripting CAD: Tool Development Circuits: Filters Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: Synthesis Miscellaneous: Neural Networks SoC: Floorplanning System: PCB physical design
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Vakhtang Janpoladov

Skills

Python Tcl/Tk Verilog

Area of Expertise

Academic: Research Academic: Teaching CAD: Scripting Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming
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Wael Zahr

Skills

C/C++ Matlab Verilog VHDL

Area of Expertise

Academic: Research Academic: Student Circuits: Microcontrollers Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: Fabrication Process System: FPGA Programming System: PCB
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N180415 VEMU SINDHURA

Skills

Cadence Virtuoso System Verilog Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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Huy Hung Ho

Skills

DFT

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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Anand Bariya

I have over thirty years of experience in the semiconductor industry, having worked in fab, EDA and design engineering. have built and led large, geographically distributed teams at a senior manager level. I am passionate about developing talent and skills, particularly in young people from socio-economically underprivileged backgrounds.

Skills

Leadership Perl

Area of Expertise

Academic: Teaching Business: Design Services Business: Management Digital: DFT Digital: Placement and Routing Digital: Synthesis SoC: ESD SoC: Floorplanning
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David Shetterly

Sr. Electrical Engineer with 40 years of experience, doing R&D, circuit design from concept through layout and to production in Aerospace, Automotive, Industrial and Gas and Oil down-hole business sectors.

Skills

Analog & Digital Circuit design C/C++ PCB layout spice Verilog VHDL

Area of Expertise

Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming System: PCB System: Signal Integrity System: Test Equipment System: Test Programming
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Michael Smith

I exist.

Skills

Verilog

Area of Expertise

Digital: DFT
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Idris Somoye

Skills

C/C++ Cadence Encounter Cadence Virtuoso Eagle CAD Magic CAD Matlab ngspice System Verilog xyce vivado

Area of Expertise

Academic: Research Digital: DFT Digital: RTL
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Tapas Semicon

Skills

C/C++ Python Software Developer System Verilog Verilog

Area of Expertise

Business: Design Services Circuits: Microcontrollers Circuits: Sensors Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Verification SoC: Floorplanning SoC: Verification
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Azeem Gadkari

Skills

C/C++ Cadence Virtuoso Matlab Python System Verilog Verilog LTE Spice Quartus Prime Lite OpenLane

Area of Expertise

Academic: Student Analog: Design Digital: DFT System: FPGA Programming
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Jibril Aga

Skills

Cadence Encounter Electric CAD

Area of Expertise

Analog: Design Digital: DFT
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Juan Diego Garcia

Skills

C/C++ Cadence Virtuoso Calibre ngspice System Verilog Tcl/Tk Verilog

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification SoC: Floorplanning
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SAMRAT CHHABRA

Enthusiastic electronics engineer passionate about the digital VLSI domain.

Skills

C/C++ Matlab System Verilog Verilog VHDL

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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Lance J Lueloff

From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...

Skills

C/C++ Cadence Encounter Cadence Virtuoso Calibre Eagle CAD Leadership Netgen ngspice Octave Python Software Developer System Verilog Tanner L-Edit Verilog VHDL

Area of Expertise

Academic: Research Academic: Student Academic: Teaching Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Business: Management Business: Marketing Business: Packaging Business: Patents Business: PCB Manufacture Business: Public Relations Business: Sales CAD: Scripting CAD: Tool Development Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: Synthesis Digital: Verification etc. Gemology, Lapidary, Geology, Survey, Mining, etc. Miscellaneous: Cryptography Miscellaneous: Neural Networks System: FPGA Programming System: Test Programming
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Geo Jo

Skills

C/C++ Cadence Encounter Cadence Virtuoso Calibre Diva Eagle CAD Eldo Electric CAD Hercules Leadership Magic CAD Matlab Netgen ngspice Octave Perl Python Scilab SKILL Software Developer Spectre SPICE Opus System Verilog System-C Tanner L-Edit Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research Academic: Teaching Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Business: Design Services Business: Foundry Services Business: Management Business: Marketing Business: Packaging Business: Patents Business: PCB Manufacture Business: Public Relations Business: Sales CAD: Scripting CAD: Tool Development Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography Miscellaneous: Neural Networks SoC: ESD SoC: Floorplanning SoC: Verification System: Chip Editing System: Fabrication Process System: FPGA Programming System: Packaging System: PCB System: Power Integrity System: Quality Assurance System: Signal Integrity System: Test Equipment System: Test Programming
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Seetal Potluri

I'm a tenure-track assistant professor

Skills

Cadence Encounter Verilog

Area of Expertise

Academic: Research Digital: DFT Miscellaneous: Neural Networks
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Hernan Tang

Embedded Software designer

Skills

C/C++ Eagle CAD Magic CAD Software Developer System Verilog System-C Verilog VHDL

Area of Expertise

CAD: Scripting Circuits: Filters Circuits: Signal Processing Digital: DFT Digital: RTL Digital: Synthesis Miscellaneous: Neural Networks System: FPGA Programming System: PCB
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王大明

Skills

Python Tcl/Tk Verilog

Area of Expertise

Digital: DFT
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Sahin Bas

Skills

Cadence Encounter Cadence Virtuoso Calibre Matlab Octave Python Spectre System Verilog Verilog

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification
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Opatunji Adekunle

I am a passionate seeker of beneficial knowledge. I am into hardware design technology.

Skills

C/C++

Area of Expertise

Digital: DFT
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Andre Tancredo

Senior IC Design Engineer

Skills

Digital Design Test Semiconductor Flow

Area of Expertise

Academic: Teaching Circuits: Microcontrollers Digital: DFT
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Oguz Meteer

Digital ASIC designer @ SenCure

Skills

Cadence Virtuoso System Verilog Verilog VHDL

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification
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Junseop Lee

Skills

Cadence Encounter System Verilog Verilog

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis
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Theodore Franklin

Skills

Python System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research CAD: Scripting Digital: DFT Digital: Synthesis Digital: Verification System: FPGA Programming System: PCB
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Ali Gul

Hellow My self Ali Gul currently pursuing my bacholar degree in Telecommunication Engineering From Quaid-E-Awam University Of Engineering Science & Technology Nawabshah and Hunger of gain some practicle knowlwdge in Circuit Design And Networking

Skills

Leadership Matlab Python

Area of Expertise

Academic: Student Analog: Design Circuits: Communication Circuits: Microcontrollers Circuits: Signal Processing Digital: DFT
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Ismail Youssef

Skills

System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification SoC: Floorplanning System: FPGA Programming
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Shahjahan Sangrasi

I am a final year Computer engineering student at Habib University. I am currently focused on in-depth study of RISCV architecture, and SoC design for Robots.

Skills

C/C++ Matlab Python Tcl/Tk Verilog

Area of Expertise

Academic: Student Analog: Layout Circuits: Filters Circuits: Microcontrollers Circuits: Sensors Circuits: Signal Processing Digital: DFT Digital: RTL System: FPGA Programming
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Sujith Kani.A

Skills

C/C++ Matlab

Area of Expertise

Academic: Student Analog: Design Digital: DFT
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Ilho Kook

ASIC Design Enthusiator

Skills

C/C++ Magic CAD Netgen ngspice System-C Verilog VHDL

Area of Expertise

Academic: Teaching Digital: DFT Digital: Synthesis Digital: Verification
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Devang Sharma

Greetings! I, Devang Sharma am a B.Tech final year student studying at Jaypee Institute, Noida. I am a VLSI-enthusiast and posses moderate to advanced-level skillset(at B.Tech level). I have studied about ASIC Design Flow and learnt several HDLs(Verilog, SV, UVM).

Skills

Cadence Virtuoso Matlab Perl System Verilog Tcl/Tk Verilog

Area of Expertise

Academic: Student Digital: DFT Digital: RTL
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João Miguel Bedin

Skills

C/C++ Cadence Virtuoso Calibre System Verilog Tcl/Tk Verilog

Area of Expertise

Academic: Research CAD: Tool Development Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming
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Mohammed Salah

Experienced ASIC Digital Design and Physical Implementation Enthusiast

Skills

Cadence Encounter Tcl/Tk Verilog Synopsys Design compiler (DC) Synopsys Formality Synopsys ICC Synopsys ICC II Synopsys PrimeTime QuestaSim Vivado

Area of Expertise

Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis