Efabless Logo

Tag Search

"profiles" search for "skills": Verilog-A
Open Search

Number of Results: 5

entry image

Caspar van VRoonhoven

>10 years of experience in precision analog and sensor interface IC design.

Skills

C/C++ Cadence Virtuoso Leadership Python SKILL Spectre Verilog Precision Verilog-AMS ADCs Sensors Reference circuits

Area of Expertise

Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Circuits: Sensors
entry image

Renaud GILLON

Electrical engineer with PhD in micro-electronics, and more than 23 years experience in the automotive industry. Specialized in the development of CAD tools to support mixed-signal and smart-power IC design. Founder of SYDELITY b.v. a start-up company offering services and products accellerating system-level simulations.

Skills

C/C++ Cadence Virtuoso Mentor Questa-ADMS Python Tessent Defectsim Verilog-A(MS) VHDL-AMS VHDL-D SystemVerilog Modelica

Area of Expertise

Analog Behavioral modeling EMC ESD Fault injection Power System identification
entry image

Masoud Seifaei

Skills

C/C++ Cadence Virtuoso Matlab Python Spectre verilog-A VHDL

Area of Expertise

Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Circuits: Filters Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital: RTL
entry image

Yashas L.R

Graduate Student and Research Assistant at the MM-Wave, THZ and Photonics Lab (MTP), Arizona State University

Skills

Cadence Virtuoso Calibre Matlab ngspice Python Spectre Verilog Verilog-A

Area of Expertise

ADC Analog: Design Analog: Layout Analog: Modeling Circuits: Communication Circuits: Signal Processing High-Speed I/O RFIC Switched Capacitor
entry image

Joao Fernandes

Skills

Cadence Virtuoso Matlab Verilog-A Synopsys Custom Compiler Spice

Area of Expertise

Analog: Design Analog: Verification A&Ms Desing