Analog systems and circuit design engineer with extensive product development and applications experience with a strong focus on end markets. Proven ability to work closely with a diverse set of customers and clients to properly specify the requirements of a mixed-signal ASIC. Ability to manage product development from foundry selection through design, tape-out, and mass-production.
Analog Designer
I received the B.S. degree in Industrial Electronics Engineering from the Universitat Politècnica de Catalunya, Spain, in 2007, and the M.S. degree in Micro- and Nanoelectronics Engineering in 2009 and the Ph.D. degree in Microelectronics and Electronic Systems in 2015 both from the Universitat Autònoma de Barcelona, Spain. From 2006 to 2008, I was with Investigation Total Ware, S.A., Spain, where I was engaged in analog and mixed-signal circuit design for highly reliable wireless telecommunication systems. From 2008 to 2015, I was with the Integrated Circuits and Systems design group at the Institut de Microelectrònica de Barcelona, CNM, CSIC, Spain, designing low-power high-precision mixed-signal ASICs for integrated smart sensors and IP blocks. From 2015 to 2016, I was with Broadcom Ltd., Barcelona, Spain, developing low-power CMOS IPs like low-temperature-drift oscillators, varible-temperature-coefficient current/voltage generators, temperature sensors, cross-domain level shifting and biasing circuits, touch-sensor transmitter drivers. I am co-author of 12 publications and participant in several research and industrial projects using a wide range of CMOS technology nodes. I am recipient of the 2007 Highest Grade Point Average in the Graduating Class Award, the 2014 Best Paper Award and the 2015 Student Best Paper Award Honorable Mention. My skills include: high-performance continuous-time/switched-capacitor circuits such as low-power high-resolution ADCs/DACs using Class-AB OpAmps; system high-level modeling (SciPy/Sage, Matlab); system electrical-level modeling (Verilog/-A/-AMS); EKV circuit-level modeling; full-custom IC design cycle (gEDA Tools/Cadence Virtuoso: from schematics to layout and verification); development of low-noise and low-distortion test equipment (including microcontrollers and FPGAs) and software (using C++, Tcl, VB, Python); and, experimental IC measures and parameter extraction.
I am an EMC Specialist working at Renault and currently looking to fill my free time with interesting projects (Hardware, EMC, Design, Simulation)
i'm expert analog mixed signal IC design engineer 7 years experience
HW development engineer
Graduated 4 tears back in engineering specialized in electronics and telecommuniation engineering with a first class. Now I am working at a startup as the team lead of the embedded design team. I am also a postgraduate student in Msc in wireless communication engineering course. Creon Solutions is my freelancer name. I do image processing, PCB and circuit designs ...etc in Freelancer.com
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
Enthusiastic analog designer
I am an electronic hobbyist who enjoys building different electronic circuits and systems.
working as a analog design engineer in Cadence Benguluru(India)
Experienced Analog Design Engineer with strong background in HV CMOS ASICs.
"Lifer" IC designer focused on analog and power management for applications you don't want to know about
Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.
Passionate about engineering and electronics. Love teaching and mentoring. Highly experience in analogue and RF electronics and enjoy managing projects.
I'm an engineer with experience in analog IC design both in private companies as well as academia. Experienced in design of delay locked loop(DLL), clock recovery, field detectors, voltage limiters, operational amplifiers, current mirrors, bandgap reference and so on.
Principal Engineer at ONiO AS
An experienced mixed-signal IC design engineer / design manager with over 25 years experience. Has design and led the design of multiple mixed-signal ICs through to tapeout and silicon verification. Also experienced with the delivery of IP blocks. Worked across multiple market sectors.
Experienced leader of industry and academia focusing on developing customized hardware accelerators for low power mobile, AI and IoT devices. Over 20-years hands-on experience in all aspects of SOC and processor design. Specialties: memory design (SRAM, regfile, CAM), VLSI design for best Power, Performance, and Area (PPA) design point. Power management and power conversion including dc/dc and ac/dc. Computer Architecture and Hardware accelerator using In-Memory-Computing and Emerging Technologies (RRAM)
Masters in "Integrated Circuits & Systems" focused on Analog / Mixed Signal System/ IC design
Still an entry-level electronic engineer. Absorbing and practising information and knowledge. Just for curiosity and fun.
Electrical engineer with PhD in micro-electronics, and more than 23 years experience in the automotive industry. Specialized in the development of CAD tools to support mixed-signal and smart-power IC design. Founder of SYDELITY b.v. a start-up company offering services and products accellerating system-level simulations.
Professor of CSE at UC Santa Cruz
I am an Associate Professor teaching VLSI design, hardware security, and digital circuit design at Drexel University. My research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation and Trojan detection, and electric and thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.
Kashif Inayat currently working as a doctorate fellow researcher at System-on-Chips (SoC) Laboratory, Electronics Engineering Department of Incheon National University, South Korea. He considers himself fortunate to have the opportunity to work under Prof. Jaeyong Chung at Incheon National University. Prior to starting his Ph.D., he completed his Master of Science in Electronics and Computer Engineering (ECE) from graduate school, Hongik University in 2019 under the supervision of Prof. Seong Oun Hwang. Moreover, during MS studies he worked at Information Security and Machine Learning Lab, Hongik University, South Korea as a graduate researcher for 2.5 years. Furthermore, he chaired the special sessions at International Conference on Green and Human Information Technology (ICGHIT 2019), held in Kuala Lumpur, Malaysia (Jan, 16-18, 2019). Moreover, he is a registered member of the Pakistan Engineering Council and a reviewer for the IEEE Access Journal.
Analog Circuit Design Engineer with 22+ years of experience. Areas of expertise are OpAmp, BandGap, POR & ADCs.
SoC Architect.Technologist. Hands-on experience in complex low power SoC designs, from concept to production. Excellent track record in successful development and production of ASICs, Technologies: Bluetooth, WLAN, IoT, Gigabit Ethernet, EPON networks, Interface ICs, Broadcast TV and Communication controllers. Demonstrated consistent track record of first-pass silicon success. PhD in Low power VLSI. Recipient of US and Indian patents. Core Competency: Chip Architecture, Micro Architecture, logic design, RTL Verilog coding, Chip level verification, Static Timing analysis, Formal Verification, design rule checking, AXI, AHB and APB bus protocols, Digital ASIC methodology, DFT methodology, Low Power ASIC design, Interfacing with backend teams, Timing closure, Post silicon bring up and validation, Project Planning, Scheduling and Management, FPGA Prototyping. Author of Book "A Practical Approach to VLSI System on Chip (SoC) Design" published by Springer Nature. Domain experience: Communications, EPON, WLAN, Bluetooth, IoT, Healthcare, Nextgen TV, Automotive. Managed dynamic, cross cultural teams of size 40 to 100. Standards worked on IEEE802.3, IEEE802.11b, ac, ad. ATSE 3.0, Automotive ethernet, Bluetooth Quality standards: ISO 9002, ISO 13485, IEC 60601-2 Funded Research: Derivative Low power standard cell library development PhD Guidance: 2 one in Asynchronous VLSI design methodology and second in Sub 1V power supply for complex SoCs. Co-founded healthcare company:Sensesemi Technologies Pvt. Ltd. Academic research head and taught engineering students for their undergrad, Post grad and PhD courses Chair, IEEE NanoTechnology Council, Bangalore Section as a founder Chairperson, Current Senior IEEE member.
ECE Undergraduate Student @ Guru Gobind Singh Indraprastha University
Pham Van Khoa received the B.S. degree in Computer Technology and PhD. degree in Electronic Engineering from the University of Technology and Education, Vietnam and Kookmin University, Korea, respectively. In 2010, he joined ICDREC (Integrated Circuit Design Research and Education Center), where he was engaged in the development of VN8-01 MCU, the first commercial micro-controller fully designed and fabricated by Vietnamese. In 2011, he joined University of Technology and Education HCMC, where he is currently a senior lecturer at Department of Computer and Communication Engineering. His research interests include Low-power VLSI solutions for Memory, Energy Harvesting, Memristor-based Neuromorphic Computing Systems, Neural Network Accelerators and MP-System-on-Chip based designs.
High Performance, High Frequency Analog, Microwave, RF and Optical Chip and Package Test Software and Hardware, Multi-Chip System Integration and Reliability
Juan Camilo Castellanos received in 2009 his B.S. degree in electronic engineering from National University of Colombia in Bogota, Colombia. In 2011, he received the M.S. degree in electrical engineering from State University of Campinas, Brazil. Later, he enrolled in the Brazilian IC design programme, called CI-Brasil. In 2013, he was analogue and mixed signal designer in the non-volatile memory group at Freescale Semiconductors (Now NXP) in Brazil. He received the Ph.D. degree from Eindhoven University of Technology, The Netherlands in 2018. He was lecturer in the Informatics Department at State University of Ponta Grossa in Brazil. In 2019, he was professor at the department of mobility engineering at Federal University of Santa Catarina (UFSC), Brazil. Since 2020, he joined as professor at the Department of Electrotechnics at Federal University of Technology - Paraná/Brazil (UTFPR). His research interest includes embedded systems (IoT, smart sensors, sensor fusion, DSPs, microcontrollers, FPGAs) and analogue and mixed-signal integrated circuits for power management (DC-DC converters, charge pumps, LED drivers and current/voltage monitors, energy harvesting).
Hey! My name is Beyza and I'm an Electrical & Electronical Engineering student in Turkey. My aim is to bring together the knowledge I've gained about science and technology with other people. The more we learn and the more we develop, the better a mark we leave in the world of science. I'm constantly improving myself for a better future, and I am trying to gain as much information as possible.
hi, i am jawad. I have done my bachelors in electrical engineering from UET Lahore, Currently, as a research student, i am interested in SoC's. My future goals is to develop expertise in analog, mixed signal and RF circuits designs.
I have done undergraduate in Electronics Engineering and doing MS in IC design from NUCES-Fast Islamabad.
RF/Analog IC design and SOC
interested in rapid development environment concept of Caravel
Analog and rfic design professional working since 1997 , Mainly products on wireless ic design, development and testing. mobile, bluetooth, wlan, uwb, rfid , zigbee chips. blocks receiver, transmitter, pll, ldo, mixer, lna, pa, switch , pmic,
I am a Ph.D. student at the Faculty of Engineering Sciences, University College London. My Ph.D. research focuses on the System-on-Chip design of power electronic converters.
I am interested in new things. I've designed chips from definition to polygons, mostly in the pursuit of new capabilities.
Analog design engineer with 3+ years of experience in the analog/ mixed signal design, verification and lab validation.
administrator
Hon-Piu Lam, is a Ph.D. candidate in the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). He was an analog IC designer engineer in Valence Semiconductor from 2004 to 2007. From 2007 to 2015, he joined Fujitsu Semiconductor focusing on the embedded NOR flash design. He has been a researcher in HKUST focusing on the integrated power electronic and data converter. His research interests include readout electronics, integrated power electronics and radiation hardened electronics for experimental physics.
Undergraduate Electrical and Computer engineer at Aristotle University of Thessaloniki, in the Electronics and Computing Field.
MS Electrical Engineering Fellow with a focus on Integrated Circuits and Systems Design. Skilled in Cadence (Virtuoso, Innovus and Genus)
D Gracia Nirmala Rani received the B.E. degree in Electronics and Communication Engineering from Syed Ammal Engg College, Madurai, India, in 2004, and M.E. degree in VLSI Design from Karunya University, Coimbatore, India in 2007. She has awarded Ph.D. degree in VLSI Design from Anna University, Chennai India in 2014. She is working as an Associate Professor in Thiagarajar College of Engineering, Madurai since 2007. She teaches courses on system/digital and analog electronic design and VLSI processor architectures. Currently, five research scholars are doing their research under her guidance. She has authored or co-authored 42 international journal and conference papers like IET Circuits, Systems and Devices, Spinger, Wiley and Elsevier Publications. Also she has published 3 Books/Book Chapter in Springer LNCS and CCIS Publications. She has filed 2 Patent in BioMedical Engineering Field. She has guided the B.E students’ project which won the India Cadence Design Contest Award 2017 and 2018 instituted by Cadence Design System Pvt Ltd, Bangalore. In 2018, she was the technical program chair of the 22nd International Symposium on VLSI Design and Test. She is serving as a reviewer in IEEE Transaction on Nanotechnology, Elsevier and Inderscience Journals, respectively. Her research interests include RFIC Design, Physical Design Automation, Optimization Algorithms using Machine learning for IC and mixed signal circuits and systems for Bio-medical Devices.
Technology development in intergrated analog circuits. I'm available to design analog and mixed-signal circuits as an external contractor.
electronic system designer / software and hardware engineer, embeded system expert, signal expert, proccess designer, researcher, Developer of complexity and reversal wantings. Reverse engineer. i addopt my whole life to this science. thank you for presentings of quantum, psych
Adjunct professor in Columbia University.
Undergraduate Electrical and Computer engineer at Aristotle University of Thessaloniki, in the Electronics and Computing Field.
An energetic semiconductor professional with varied experience in the field of research, teaching and IC design. 📌 More than 6 years of experience in analog and mixed signal IC design. 📌 3 years of mentoring experience in analog circuit and layout design. 📌 Been part of the 4 complete IC development project. 📌 Inventor and co-inventor of 2 patents (filed) in the field of high-speed data path communication. 📌 Published few research papers with more than 30 engineering citations. 📌 6 month experience as a lead role in standard cell library development in a leading semiconductor organisation. 📌 more than 4 years of teaching experience in under-graduate electronics engineering courses.
Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.
A digital design engineer, interested in memory hierarchies and high speed interfaces.
I am an analog circuit designer with 6+ yrs of designing various PMIC and high speed SerDes IP design.
President and CEO
An analog mixed-signal circuit designer for low-power precision sensor interfaces. See https://staff.aist.go.jp/ippei.akita/
Analog Design Engineer
IC designer with more than 25 years post Ph.D. experience. Specialising in RF, RFIC, analog and mixed-signal. Wide experience in Architecture, system and circuit design. RF front-end module design for cellular with CMOS PA. Over 40 patents issued.
A bit of everything - mostly focused on networking system level designs / FPGA / Switch Fabric from concept to validation - and now automotive
Adroitec Systems is design Services Company for the VLSI and Embedded Software. Founded in 2017, Adroitec Systems is having Register Office at Visakhapatnam with branch offices in Bangalore. Adroitec Systems delivers cutting edge solutions across a diverse portfolio of services including Physical Design, Physical Verification, and Design Verification. With about 50 highly qualified employees.
I am an analog design engineer with over 10 years of experience. Most of designs lie in the field of power management (DC/DC converters), frequency synthesis (phase-locked loops), wireless power and data transfer (NFC front-ends as well as medical implants).
I've done everything from silicon design at the "bottom of the stack" to System Architecture and Design (with plenty of SW to go with it; at every level)
Engineer / VP
My name is Sunil Parmar, I have done a master from IIT-Bombay in 2005 and a bachelors from Gujarat University in 2003. After post-graduation, I joined a service company in Hyderabad and later worked with Intel Bangalore. I have worked with the Samsung R&D center in South Korea for Silicon photonics applications and later contributed in Samsung's DDR4 memory IO design. As an employee, I have published few patents and papers. In 2016, I returned to India with a very ambitious goal to set up a semiconductor product company called Powency Circuit Private Limited in the power management domain. In between, After Covid, I decided to develop a MEMS Microphone product and started a project called Sikern. We are currently a small team having three design engineers, one packaging expert and one management staff. We are working with a Japanese supplier and a Malaysian packaging group for our product development. And developing our own ASIC for this MEMS microphone. We started working with a smartphone customer in India for their upcoming mobile model. And hope to work with many more customers within India as well across the globe for our Microphone product.
Hardware System Designer from ASIC chip to board to SOC platform
Analog IC Design Engineer for research and development of ultimate power supply miniaturization using custom eGaN IC.
EE PCB, Systems, Mechnical, Cooling, Power Used to sling a lot of gates (polygons) in esoteric processes (Gallium Arsenide, JJ)
Graduate student in MIT EECS trying to combine stochastic MTJ devices to silicon
30+ years industry experience in hardware and SOC design, with specialisation in Functional Verification, Silicon Validation, SI/PI and Board design
Analog-RF IC circuit and system design engineer.
Graduated as electronic engineer in '93. Think it could be nice and fun to try out this part of the electronic life/world :). I have worked a lot with digital designs over the years, everything from small LED controllers to larger computer boards. And then I am a PCB geek.
Microwave/RF Electrical Engineer. Love learning new things.
Power electronics IC designer with in-depth experience in switched-capacitor and hybrid DC-DC converters.
CSE Professor at the University of Notre Dame
Seasoned VLSI professional with experience in complete chip design flow, domain experience data communication and telecom.
From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...
I love to learn and make things. RF, power electronics and AI/ML get me really wondering, what could we do with all of them.
Hao-Yen Tang received his PhD degree from UC Berkeley Advised by Prof. Bernhard E. Boser, his PhD research, PMUT ultrasonic fingerprint sensor, convince InvenSense senior management to make a heavy investment to take this technology to mass market. At InvenSense he’s leading a multi-disciplinary system team for the next generation ultrasonic fingerprint sensor bringup, characterization and calibration, coordinating the works from different field including acoustic, MEMS, CMOS, FW, and SW. Currently, he serves as CTO/Co-Founder in the startup company UltraSense Systems. The company is aiming to transform any surface material into a Touch/Press user interface with it’s proprietary PiezoMEMS-CMOS technology. Dr. Tang is the recipient of 2016 ISSCC Best Paper Award (Lewis Winner Award for Outstanding Paper), 2015 SSCS Pre-Doctoral Award and 2015 ADI Outstanding Student Designer Award. Currently he holds 20+ granted patents, 20+ publications, and 2000+ citations.
Adjunct Professor and Chief Mentor, Advanced VLSI Lab Silicon University, Bhubaneswar, India
A passionate individual interested in fusion of energy efficient computation and nanoelectronics along with its integration in conventional technologies and deployment to solve pressing challenges
Founder / director of SLICE Semiconductor, specialising in analog IC design contract services and high performance mixed signal ASIC solutions.
analog and power IC designer. multiple commercial projects experiences.
Since 2001 I have worked for a small IC Layout design firm located in Wilsonville, Oregon called Coast-to-Coast Layout Design Inc. We provide full-custom mask design services to big semiconductor partners, both digital and analog/mixed-signal. I began my career as a part-time Linux systems administrator, and was taught mask design by my mentor and boss, then over the past couple decades I moved up the ranks to my current GM position where I am responsible for most day-to-day operations and management of multiple mask design teams who are very highly valued by our customers that rely on our services to meet tough tapeout schedule and quality requirements. I'm here because I'm planning to use open-source EDA tools to help train new mask designers to help grow my company.
