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"profiles" search for "area_of_expertise": SoC: ESD

Number of Results: 40


Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.

David Garner

An experienced mixed-signal IC design engineer / design manager with over 25 years experience. Has design and led the design of multiple mixed-signal ICs through to tapeout and silicon verification. Also experienced with the delivery of IP blocks. Worked across multiple market sectors.

Shinya Takeuchi

I like to make toys like flapping planes.

Tony Chan

30+ years in IC design, completed several NOR/NAND flash projects, and running in production.

Abdul Wadood

Final year student of Electrical Engineering at UET Lahore. Area of expertise is Digital Design, Computer Architecture and SOCs.

Shivam Potdar

RISC-V Enthusiast GSoC 2020 @ FOSSi Foundation RA @ CAD Lab, IISc Bengaluru, India EE Senior @ NITK Mangalore, India

Malcolm Smith

IC designer with more than 25 years post Ph.D. experience. Specialising in RF, RFIC, analog and mixed-signal. Wide experience in Architecture, system and circuit design. RF front-end module design for cellular with CMOS PA. Over 40 patents issued.

Gabriel Costa

I am an analog design engineer with over 10 years of experience. Most of designs lie in the field of power management (DC/DC converters), frequency synthesis (phase-locked loops), wireless power and data transfer (NFC front-ends as well as medical implants).

Anand Bariya

I have over thirty years of experience in the semiconductor industry, having worked in fab, EDA and design engineering. have built and led large, geographically distributed teams at a senior manager level. I am passionate about developing talent and skills, particularly in young people from socio-economically underprivileged backgrounds.

Sai Srinivas TNS

VLSI DOMAIN SKILLS --------------------------- • Digital Electronics • HDL: Verilog • HVL: System Verilog • TB Methodology: UVM • Protocols: APB, UART, I2C, SPI • EDA Tools: Modelsim, Quartus Prime, Questasim. VLSI RTL SKILLS ---------------------- • Digital Skills : Combinational and Sequential circuits • FSM • Memories • Verilog : Data types • Operators • BA and NBA • Delays in Verilog • Begin-end and fork-join Blocks • System tasks and Function • Compiler directive • FSM Coding. VLSI VERIFICATION SKILLS ------------------------------------ • System Verilog HVL: Data Types • Memories • Interface • OOPS • Constraint Randomization • Threads • Functional coverage • CRCDV • SV Testbench (Hands on SV Testbench) • Universal Verification Methodology: UVM Objects and Components • UVM Factory • UVM Phases • UVM Configuration • TLM • Virtual Sequence and Sequencer • UVM Testbench (Hands on UVM Testbench).

Berna Ors Yalcin

Berna Örs received the Electronics & Communication Engineering degree and the MSc degree in 1995 and 1998, respectively, both from the Istanbul Technical University (ITU), Turkey. She received the Electrical Engineering degree in applied sciences from the Katholieke Universiteit Leuven, Belgium, in 2005. Currently, she is a Professor at ITU. Her main research interests include cryptography, embedded systems, and side-channel attacks.