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MAYANK VASHISHT

vashistmayank2

Email: vashistmayank2@gmail.com
Phone: +91 79820 37427
LinkedIn: Public Profile
Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.

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Skills

Cadence Virtuoso Matlab Octave SKILL Spectre System Verilog Verilog

Area of Expertise

Analog: Design Analog: Modeling Analog: Simulation Analog: Verification Circuits: Filters Circuits: Power Management Circuits: Signal Processing Digital: Verification SoC: ESD System: Test Programming

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