Efabless Logo

Profile Details

profile image

David Garner

david

Email: david@davidgarner.org.uk
LinkedIn: Public Profile
An experienced mixed-signal IC design engineer / design manager with over 25 years experience. Has design and led the design of multiple mixed-signal ICs through to tapeout and silicon verification. Also experienced with the delivery of IP blocks. Worked across multiple market sectors.

Organization Memberships

This profile is not a member of any organization.

Skills

Cadence Virtuoso Diva Leadership Matlab Octave SKILL Spectre

Area of Expertise

Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Business: Design Services Business: Management Business: Patents Circuits: Communication Circuits: Filters Circuits: Power Management Circuits: Sensors Circuits: Signal Processing SoC: ESD SoC: Floorplanning SoC: Verification System: Chip Editing System: Fabrication Process System: Power Integrity System: Quality Assurance System: Signal Integrity System: Test Equipment

Badges

This profile has no badges.