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"profiles" search for "area_of_expertise": Digital-RTL

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Number of Results: 53

Syed Arsalan Jawed

I have been working on Analog/Mixed-Signal Integrated Circuits design since last 16 years. I graduated from NED UET, Karachi in 2001 and then worked with Avaz Networks, a Silicon-Valley Company on RTL design and verification of a high-density Line Echo Cancellation Engine for a couple of years. Joined Linkoping University, Sweden in 2003 for Masters in SOC, which concluded with a Masters Thesis on Sigma-Delta Modulators with Fraunhofer Institute of Integrated Circuits, Germany in 2005. The same year I joined University of Trento and Fondazione Bruno Kessler, Trento, Italy for my PhD on Readout Interface Design for MEMS Capacitive Microphones. Worked with ST-Microelectronics, Milano and Analog-Devices, Copenhagen as a Guest PhD Student. This Phd results in 20+ publications and 2 patents with 3 successful MEMS Readout ASICs.

Skills

Analog Analog CMOS Circuit Analog IC Design Analog/Digital Circuit Design C/C++ Circuit Design Matlab Verilog VLSI/ASIC and SoC Development

Area of Expertise

Analog Analog IC Analog IC Design Analog-ADC Analog-Amplifiers Analog-Layout Analog-Modeling Analog-Simulation Analog-Verification ASIC Design/Verification Digital-RTL

Clifford Wolf

Author of Yosys, IceStorm, PicoRV32, and other Open Source things

Skills

C/C++ Circuit Design Python Software Developer Verilog

Area of Expertise

ASIC Design/Verification Automatic Circuit Design CAD-Dev CAD-Scripts Design Automation Digital-DV Digital-RTL Evolutionary algorithm signal processing

PEER MOHAMED

Skills

Analog CMOS Circuit Analog IC Design Analog/Digital Circuit Design Matlab Verilog VLSI/ASIC and SoC Development

Area of Expertise

Analog IC Design Analog-Modeling Analog-Simulation ASIC Design/Verification Automatic Circuit Design Communication and Signal Processing Design Automation Digital-DFT signal processing Analog-ADC Digital-RTL

Tim Edwards

Developer of open source EDA tools on Open Circuit Design

Skills

Analog CMOS Circuit Analog IC Design Analog/Digital Circuit Design C/C++ Circuit Design Matlab Python Software Developer Verilog VLSI/ASIC and SoC Development

Area of Expertise

Analog Analog IC Analog IC Design Analog-Layout Analog-Mixed Signal-DV Analog-Simulation Analog-Verification ASIC Design/Verification Automatic Circuit Design CAD-Dev CAD-Scripts Communication and Signal Processing Cryptography Design Automation Digital-DFT Evolutionary algorithm signal processing SOC-DV SOC-ESD SOC-Packaging System-PCB System-Signal-Integrity Analog-ADC Analog-LDO Digital-BE Digital-DV Digital-RTL System-DSP System-Filters

Giri Krishna

Electronics Engineer

Skills

Analog/Digital Circuit Design Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-RTL

Ahmed Khalaf

Skills

C/C++ Software Developer Verilog

Area of Expertise

Digital-RTL

Rama Kotapally

I have 20 years of experience in Circuit Design, Physical Design, RTL.

Skills

Circuit Design Perl Python VLSI/ASIC and SoC Development

Area of Expertise

Digital-BE Digital-RTL

Sun

Engineer, who typically worked in start up environment. So do A-Z, a-z and 1 - infinity if something has to work

Skills

C/C++ Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Communication and Signal Processing signal processing SOC-DV Digital-DV Digital-RTL

Dave Cox

Hardware Design Enthusiast

Skills

C/C++ Verilog

Area of Expertise

Digital-RTL

Max Fil

Skills

C/C++ Matlab Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Communication and Signal Processing Digital-RTL System-DSP

Tomasz Hemperek

Skills

Verilog

Area of Expertise

Digital-RTL

Sethu Raman

Skills

Analog CMOS Circuit Analog Analog IC Design Analog/Digital Circuit Design Circuit Design Noob Perl Verilog

Area of Expertise

Analog Analog IC Analog IC Design Analog-Modeling Analog-Simulation Digital-RTL

Anton Paquin

EE student. ++ Neuromorphic circuits

Skills

Analog/Digital Circuit Design Python Verilog

Area of Expertise

CAD-Scripts Digital-RTL

Ankit K V

Electronics Freak !

Skills

VLSI/ASIC and SoC Development

Area of Expertise

Digital-RTL

Quswar Mahmood Abid

Skills

Analog/Digital Circuit Design

Area of Expertise

ASIC Design/Verification Cryptography Digital-RTL

Wessam Ahmed

Senior ASIC Design Engineer

Skills

Analog/Digital Circuit Design Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-DFT Digital-DV Digital-RTL

Prashant Dabholkar

FPGA Design Engineer

Skills

Analog/Digital Circuit Design Python Verilog

Area of Expertise

ASIC Design/Verification Digital-RTL

BZERROUK

Skills

Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-DV Digital-RTL

Steve Hoover

EDA Founder

Skills

Circuit Design Software Developer Verilog VLSI/ASIC and SoC Development

Area of Expertise

Design Automation Digital-RTL

Abdelkrim Bessaad

I am an Analog/mixed signal IC designer. I worked with different technologies like ams035, xh035 and st 130nm.

Skills

Analog CMOS Circuit Analog Analog IC Design Analog/Digital Circuit Design Circuit Design Matlab VLSI/ASIC and SoC Development

Area of Expertise

Analog IC Design Analog-Amplifiers Analog-Layout Analog-Simulation Digital-RTL

Michael Vacek

Skills

C/C++ Circuit Design Matlab Python Software Developer Verilog VLSI/ASIC and SoC Development

Area of Expertise

Communication and Signal Processing signal processing System-PCB Digital-RTL System-DSP

MOUSTAFA KHAIRY ABDELGALIL

SoC Design Enginner

Skills

Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Cryptography Digital-RTL

Braedon Salz

Skills

Analog/Digital Circuit Design Software Developer Verilog

Area of Expertise

System-Signal-Integrity Analog-LDO Digital-RTL

Shriniket Sawant

Recent college graduate from San Jose State University with Masters in Electrical Engineering degree. Specialization - Digital Design and Verification.

Skills

Analog/Digital Circuit Design Circuit Design Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-DV Digital-RTL

Mustafa BALCI

Skills

C/C++

Area of Expertise

Digital-RTL

Joaquín Venegas

Skills

Python Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-RTL

Will Burke

Hardware Engineer

Skills

Circuit Design Python Verilog VLSI/ASIC and SoC Development

Area of Expertise

Automatic Circuit Design Digital-BE Digital-RTL

jmgil

Skills

C/C++

Area of Expertise

Digital-RTL

SANJAIKUMAR K

Skills

Analog/Digital Circuit Design Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-DV Digital-RTL

MADHUSHREE

Skills

Analog CMOS Circuit Analog/Digital Circuit Design C/C++ Perl Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification SOC-DV Digital-DV Digital-RTL

Watson Huang

Skills

C/C++ Python Verilog

Area of Expertise

ASIC Design/Verification Digital-RTL

Emre Kırkaya

PhD candidate on digital electronics

Skills

C/C++ Matlab Verilog

Area of Expertise

Digital-RTL

CHIRAG KASLIWAL

Specialized Engineer in VLSI Design

Skills

Analog/Digital Circuit Design C/C++ Scilab Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-RTL

Shri Prakash

Skills

Python Verilog VLSI/ASIC and SoC Development

Area of Expertise

SOC-DV Digital-RTL

Hyunjin Noh

Skills

C/C++ Matlab Python Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Design Automation Digital-RTL

MD AKRAMUDDIN

Skills

C/C++ Matlab Perl Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-RTL

Meghana TJ

Skills

Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-RTL

Ashutosh Jain

Skills

Analog/Digital Circuit Design Matlab Python Verilog

Area of Expertise

ASIC Design/Verification Digital-RTL

Mustafa Tosun

I am a digital design/verification engineer. I have 2 years of full-time industry experience. In total, I have 4.5 years of experience in RTL design, Electronic Design Automation and Verification using VHDL/Verilog, Perl, Tcl and Linux. I was the #1 graduate of Bahcesehir University in Mechatronics Engineering in 2013

Skills

C/C++ Matlab Perl Python Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Communication and Signal Processing Design Automation Digital-RTL

Shubham Sarkar

Skills

Analog/Digital Circuit Design C/C++ Circuit Design Python Verilog

Area of Expertise

Digital-RTL

Vishwajeet S B

I'm VLSI Design Engineer aspirant and like to work on design challenges in VLSI domain. I like to keep updated of cutting-edge technology in my field of interest.

Skills

Analog CMOS Circuit Circuit Design Matlab Python Verilog

Area of Expertise

Digital-RTL

Chandana Archita Bachhu

Skills

Circuit Design Perl Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-RTL

Davy Huang

Skills

C/C++ Circuit Design Perl Python System-C Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification System-PCB Digital-RTL

Hardik Manocha

Intern with Synopsys VIP Group, Working on HDMI VIP Development

Skills

Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-DV Digital-RTL

Deepak Siddharth Parthipan

I am Digital/SoC Design and Verification enthusiast.

Skills

C/C++ Noob Perl Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-DFT SOC-DV Digital-DV Digital-RTL

Sivaram P. Rao

Skills

Verilog VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Digital-RTL

Doug Miller

Skills

C/C++

Area of Expertise

Digital-RTL

Mario Vigliar

Mad about OSS system design, specialized in video compression and image processing, CNN and dedicated HPC architectures. New deals in low power design

Skills

C/C++ Circuit Design Matlab Python Verilog VLSI/ASIC and SoC Development

Area of Expertise

Digital-RTL System-DSP System-Filters

jatindersingh

Skills

Analog/Digital Circuit Design C/C++ Electric CAD Magic CAD ngspice Python System Verilog System-C Tcl/Tk Verilog VHDL VLSI/ASIC and SoC Development

Area of Expertise

Analog-SMPS Analog: Simulation Analog: Verification Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Circuits: Sensors Circuits: Signal Processing Digital-DV Digital-RTL Digital: DFT Digital: Placement and Routing Miscellaneous: Neural Networks SOC-DV SoC: ESD SoC: Floorplanning SoC: Verification System-DSP System: Chip Editing System: FPGA Programming

Rajat Bansal

A student pursuing B.Tech in Electronics and Communication branch.

Skills

Circuit Design

Area of Expertise

Digital-RTL

Juan Pablo Mena

Skills

C/C++ Matlab Python Verilog

Area of Expertise

Digital-RTL

Travis Ayres

Skills

Verilog

Area of Expertise

Digital-RTL

Belal RAFFED

Skills

Analog CMOS CIrcuit C/C++ CIrcuit Design Eagle CAD Electric CAD Matlab ngspice Object Oriented programming PCB Design and Verification flow Perl Scripting Real Time Programming RTL Simulation Software Developer System Verilog Tanner L-Edit Unix/Linux environments Verilog VHDL VLSI/ASIC and SOC Development

Area of Expertise

Analg-ADC Analog IC Design Analog-ADC Analog-Layout Analog-Simulation CAD: Scripting Circuits-Microcontrollers Digital-RTL Digital-Verification SOC-DV System-Bring up System-FPGA Emulation System-PCB System-Signal Integrity System-Test Equipment